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It turned out that with the default value of 1, Vivado infers a separate 18 Kbit BRAM instance for each bit of the 32-bit word for the FPGA examples. This can be very wasteful in terms of resource utilization especially for smaller configurations. As our examples don't use ECC or parity and mainly target simualation and FPGA, it's better to use a value of 8 for the DataBitsPerMask parameter. Vivado will then not distribute words across different BRAM instances which results in more efficient FPGA resource utilization. For a detailed analysis and explanation, please refer to lowRISC/Ibex#1587. Signed-off-by: Pirmin Vogel <vogelpi@lowrisc.org> |
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fpga_xilinx.core | ||
sim_shared.core |