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ibex/doc/03_reference
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Greg Chadwick 70186c57ae [rtl] Add ic_scr_key_valid field to CPUCTRL (renamed CPUCTRLSTS) 
The ic_scr_key_valid field indicates whether the ICache scrambling key
is valid.

CPUCTRL is also renamed CPUCTRLSTS as it contains both control and
status bits.
2022-09-22 16:17:31 +01:00
..
images [doc] Add new Ibex testplan 2022-01-11 12:49:04 +00:00
cosim.rst Update spike_cosim.cc to be able to build against newer Spike versions 2022-06-01 00:50:49 +02:00
coverage_plan.rst [dv,fcov] Implement Misaligned Mem Error coverage 2022-07-21 01:02:15 +03:00
cs_registers.rst [rtl] Add ic_scr_key_valid field to CPUCTRL (renamed CPUCTRLSTS) 2022-09-22 16:17:31 +01:00
debug.rst Add support for additional HW breakpoints 2020-10-19 13:20:08 +02:00
exception_interrupts.rst Made values of mcause 32 bits 2022-08-18 13:16:21 +01:00
history.rst Restructure documentation 2020-09-28 22:30:00 +01:00
icache.rst [rtl] Add ic_scr_key_valid field to CPUCTRL (renamed CPUCTRLSTS) 2022-09-22 16:17:31 +01:00
index.rst [doc] Add new Ibex testplan 2022-01-11 12:49:04 +00:00
instruction_decode_execute.rst [bitmanip, doc] Update info on bitmanip support and area numbers 2021-12-16 14:18:00 +01:00
instruction_fetch.rst [rtl] Add bus integrity checking 2021-08-26 16:55:26 +01:00
load_store_unit.rst Introduce internal interrupt concept 2022-04-01 17:00:23 +01:00
performance_counters.rst Restructure documentation 2020-09-28 22:30:00 +01:00
pipeline_details.rst Restructure documentation 2020-09-28 22:30:00 +01:00
pmp.rst [rtl,doc] Add customisable PMP reset values 2022-01-24 10:01:36 +00:00
register_file.rst Restructure documentation 2020-09-28 22:30:00 +01:00
rvfi.rst Restructure documentation 2020-09-28 22:30:00 +01:00
security.rst Introduce internal interrupt concept 2022-04-01 17:00:23 +01:00
testplan.rst [doc] Add new Ibex testplan 2022-01-11 12:49:04 +00:00
tracer.rst [rtl] Add a new top level plus wiring 2021-04-07 12:07:38 +01:00
verification.rst Update spike_cosim.cc to be able to build against newer Spike versions 2022-06-01 00:50:49 +02:00