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Harry Callahan 9c7e6806b2 Update rtl_simulation.yaml to use new <rtl_sim_log> for vcs 
This should have been changed to match xcelium etc. when the build system
refactor was merged.
2022-10-05 10:28:46 +01:00
..
cosim [cosim] Fix spike cosim instruction count 2022-09-30 09:41:07 +01:00
cs_registers [rtl] Alter some CSR WARL behaviour to match spike 2022-08-09 21:15:09 +01:00
riscv_compliance Updating parameters for OpenTitan option 2022-04-28 15:14:42 +01:00
uvm Update rtl_simulation.yaml to use new <rtl_sim_log> for vcs 2022-10-05 10:28:46 +01:00
verilator [cosim] Pass Ibex config through for verilator cosim 2022-09-30 09:41:07 +01:00