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This commit creates a new top level wrapping the core, register file and icache RAMs. The tracing top level is also renamed to ibex_top_tracing to match. This new top level is intended to enable a dual core lockstep implementation of Ibex. There are no functional changes in this commit, only wiring. Signed-off-by: Tom Roberts <tomroberts@lowrisc.org>
55 lines
2.9 KiB
ReStructuredText
55 lines
2.9 KiB
ReStructuredText
.. _tracer:
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Tracer
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======
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The module ``ibex_tracer`` can be used to create a log of the executed instructions.
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It is used by ``ibex_top_tracing`` which forwards the `RVFI signals <https://github.com/SymbioticEDA/riscv-formal/blob/master/docs/rvfi.md>`_ to the tracer (see also :ref:`rvfi`).
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Output file
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-----------
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All traced instructions are written to a log file.
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By default, the log file is named ``trace_core_<HARTID>.log``, with ``<HARTID>`` being the 8 digit hart ID of the core being traced.
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The file name base, defaulting to ``trace_core`` can be set using the ``ibex_tracer_file_base`` plusarg passed to the simulation.
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For example, ``+ibex_tracer_file_base=ibex_my_trace`` will produce log files named ``ibex_my_trace_<HARTID>.log``.
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The exact syntax of passing plusargs to a simulation depends on the simulator.
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Disabling the tracer
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--------------------
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If the instruction log is not needed for a specific simulation run, the tracer can be disabled.
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The plusarg ``ibex_tracer_enable`` controls the tracer.
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The tracer is enabled by default.
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To disable the tracer use ``ibex_tracer_enable=0`` with the correct plusarg syntax of the simulator.
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Trace output format
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-------------------
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The trace output is in tab-separated columns.
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1. **Time**: The current simulation time.
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2. **Cycle**: The number of cycles since the last reset.
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3. **PC**: The program counter
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4. **Instr**: The executed instruction (base 16).
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32 bit wide instructions (8 hex digits) are uncompressed instructions, 16 bit wide instructions (4 hex digits) are compressed instructions.
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5. **Decoded instruction**:
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The decoded (disassembled) instruction in a format equal to what objdump produces when calling it like ``objdump -Mnumeric -Mno-aliases -D``.
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- Unsigned numbers are given in hex (prefixed with ``0x``), signed numbers are given as decimal numbers.
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- Numeric register names are used (e.g. ``x1``).
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- Symbolic CSR names are used.
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- Jump/branch targets are given as absolute address if possible (PC + immediate).
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6. **Register and memory contents**: For all accessed registers, the value before and after the instruction execution is given. Writes to registers are indicated as ``registername=value``, reads as ``registername:value``. For memory accesses, the address and the loaded and stored data are given.
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.. code-block:: text
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Time Cycle PC Instr Decoded instruction Register and memory contents
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130 61 00000150 4481 c.li x9,0 x9=0x00000000
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132 62 00000152 00008437 lui x8,0x8 x8=0x00008000
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134 63 00000156 fff40413 addi x8,x8,-1 x8:0x00008000 x8=0x00007fff
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136 64 0000015a 8c65 c.and x8,x9 x8:0x00007fff x9:0x00000000 x8=0x00000000
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142 67 0000015c c622 c.swsp x8,12(x2) x2:0x00002000 x8:0x00000000 PA:0x0000200c store:0x00000000 load:0xffffffff
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