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40 lines
1.7 KiB
Text
40 lines
1.7 KiB
Text
// Copyright lowRISC contributors.
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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// Lint waivers for processing simple_system RTL with Verilator
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//
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// This should be used for rules applying to things like testbench
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// top-levels. For rules that apply to the actual design (files in the
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// 'rtl' directory), see verilator_waiver_rtl.vlt in the same
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// directory.
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//
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// See https://verilator.org/guide/latest/exe_verilator.html#configuration-files
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// for documentation.
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//
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// Important: This file must included *before* any other Verilog file is read.
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// Otherwise, only global waivers are applied, but not file-specific waivers.
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`verilator_config
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// We have some boolean top-level parameters in e.g. simple_system.sv.
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// When building with fusesoc, these get set with defines like
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// -GRV32E=1 (rather than -GRV32E=1'b1), leading to warnings like:
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//
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// Operator VAR '<varname>' expects 1 bits on the Initial value, but
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// Initial value's CONST '32'h1' generates 32 bits.
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//
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// This signoff rule ignores errors like this. Note that it only
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// matches when you set a 1-bit value to a literal 1, so it won't hide
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// silly mistakes like setting it to 2.
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//
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lint_off -rule WIDTH -file "*/rtl/ibex_simple_system.sv"
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-match "*expects 1 bits*Initial value's CONST '32'h1'*"
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// This isn't a waiver, as such, but rather tells Verilator to expose
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// the given parameters' values to C++. This allows cosim to figure
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// out what flavour of core it is running, which allows us to call
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// Spike with the right ISA.
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public -module "ibex_simple_system" -var "RV32E"
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public -module "ibex_simple_system" -var "RV32M"
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public -module "ibex_simple_system" -var "RV32B"
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