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Rahul Behl 9b51b1143a CSR: Access checks on Debug CSRs 
- The RISC-V Debug Spec v.0.13.2 (p.41) mandates that the core
    debug CSRs dcsr, dpc, dscratch0 and dscratch1 must not be
    accessible if not in debug mode. Fixes #275
2019-09-03 12:14:49 +01:00
..
verilator_waiver.vlt CSR: Access checks on Debug CSRs 2019-09-03 12:14:49 +01:00