ibex/ibex_core_tracing.core
ganoam 1aa4d5a32b [bitmanip] Optimizations and Parametrization
This commit contains some final optimizations regarding the bit
manipulation extension as well as the parametrization into a balanced
version and a full performance version.

Balanced Version:
        * Supports ZBB, ZBS, ZBF and ZBT extensions
        * Dual cycle instructions:
          ror[i], rol, cmov, cmix fsl, fsr[i]
        * Everything else completes in a single cycle.

Full Version:
        * Supports all 32b sub extensions.
        * Dual cycle instructions:
          ror[i], rol, cmov, cmix fsl, fsr[i], crc32[c], bext, bdep
        * Everything else completes in a single cycle.

Notable Changes:
        * bext/bdep are now multi-cycle: Sharing additional register
          with multiplier module
        * grev/gorc instructions are implemented in separate structures
          rather than sharing the shifter or butterfly network.
        * Speed up decision on using rs1 or rs3 for alu_operand_a by
          introducing single-bit register, to identify ternary
          instructions in their first cycle.
        * Introduce enumerated parameter to chose bit manipulation
          implementation

Signed-off-by: ganoam <gnoam@live.com>
2020-06-26 14:43:24 +02:00

158 lines
3.6 KiB
Text

CAPI=2:
# Copyright lowRISC contributors.
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0
name: "lowrisc:ibex:ibex_core_tracing:0.1"
description: "Ibex CPU core with tracing enabled"
filesets:
files_rtl:
depend:
- lowrisc:ibex:ibex_core
- lowrisc:ibex:ibex_tracer
files:
- rtl/ibex_core_tracing.sv
file_type: systemVerilogSource
files_lint:
depend:
- lowrisc:ibex:sim_shared
files_lint_verilator:
files:
- lint/verilator_waiver.vlt: {file_type: vlt}
parameters:
# The tracer uses the RISC-V Formal Interface (RVFI) to collect trace signals.
RVFI:
datatype: bool
paramtype: vlogdefine
default: true
SYNTHESIS:
datatype: bool
paramtype: vlogdefine
RV32E:
datatype: int
default: 0
paramtype: vlogparam
RV32M:
datatype: int
default: 1
paramtype: vlogparam
RV32B:
datatype: str
default: ibex_pkg::RV32BNone
paramtype: vlogdefine
description: "Bitmanip implementation parameter enum. See ibex_pkg.sv (EXPERIMENTAL)"
MultiplierImplementation:
datatype: str
paramtype: vlogparam
description: "Multiplier implementation. Valid values: fast, slow, single-cycle"
default: "fast"
ICache:
datatype: int
default: 0
paramtype: vlogparam
description: "Enable instruction cache"
ICacheECC:
datatype: int
default: 0
paramtype: vlogparam
description: "Enable ECC protection in instruction cache"
BranchTargetALU:
datatype: int
default: 0
paramtype: vlogparam
description: "Enables separate branch target ALU (increasing branch performance EXPERIMENTAL) [0/1]"
WritebackStage:
datatype: int
default: 0
paramtype: vlogparam
description: "Enables third pipeline stage (EXPERIMENTAL) [0/1]"
SecureIbex:
datatype: int
default: 0
paramtype: vlogparam
description: "Enables security hardening features (EXPERIMENTAL) [0/1]"
PMPEnable:
datatype: int
default: 0
paramtype: vlogparam
description: "Enable PMP"
PMPGranularity:
datatype: int
default: 0
paramtype: vlogparam
description: "Granularity of NAPOT range, 0 = 4 byte, 1 = byte, 2 = 16 byte, 3 = 32 byte etc"
PMPNumRegions:
datatype: int
default: 4
paramtype: vlogparam
description: "Number of PMP regions"
targets:
default:
filesets:
- files_rtl
parameters:
- RVFI=true
lint:
filesets:
# Note on Verilator waivers:
# You *must* include the waiver file first, otherwise only global waivers
# are applied, but not file-specific waivers.
- tool_verilator ? (files_lint_verilator)
- files_rtl
- files_lint
parameters:
- RVFI=true
- SYNTHESIS=true
- RV32M
- RV32E
- RV32B
- BranchTargetALU
- WritebackStage
- MultiplierImplementation
- SecureIbex
- PMPEnable
- PMPGranularity
- PMPNumRegions
default_tool: verilator
toplevel: ibex_core_tracing
tools:
verilator:
mode: lint-only
verilator_options:
- "-Wall"
# RAM primitives wider than 64bit (required for ECC) fail to build in
# Verilator without increasing the unroll count (see Verilator#1266)
- "--unroll-count 72"
veriblelint:
ruleset: default
rules:
- "-parameter-name-style"
format:
filesets:
- files_rtl
parameters:
- SYNTHESIS=true
- RVFI=true
default_tool: veribleformat
toplevel: ibex_core
tools:
veribleformat:
verible_format_args:
- "--inplace"