ibex/examples/fpga
Philipp Wagner f98ddabee1 Use the Xilinx primitives for the Arty board
Use Xilinx-specific implementations for primitives, such as RAM and the
clock gate (which will now be implemented using a BUFGCE macro, and no
longer with a latch).

Verified in Vivado synthesis to pick up the Xilinx primitive now.
2020-07-06 10:20:39 +01:00
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artya7 Use the Xilinx primitives for the Arty board 2020-07-06 10:20:39 +01:00