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33 lines
1.3 KiB
Text
33 lines
1.3 KiB
Text
-- Copyright (C) 2018 Intel Corporation. All rights reserved.
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-- Your use of Intel Corporation's design tools, logic functions
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-- and other software and tools, and its AMPP partner logic
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-- functions, and any output files from any of the foregoing
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-- (including device programming or simulation files), and any
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-- associated documentation or information are expressly subject
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-- to the terms and conditions of the Intel Program License
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-- Subscription Agreement, the Intel Quartus Prime License Agreement,
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-- the Intel FPGA IP License Agreement, or other applicable license
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-- agreement, including, without limitation, that your use is for
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-- the sole purpose of programming logic devices manufactured by
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-- Intel and sold by Intel or its authorized distributors. Please
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-- refer to the applicable agreement for further details.
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-- Quartus Prime generated Memory Initialization File (.mif)
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WIDTH=32;
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DEPTH=256;
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ADDRESS_RADIX=UNS;
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DATA_RADIX=BIN;
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CONTENT BEGIN
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0 : 00000000000000000000000000000000;
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1 : 00000000000100000000000100010011;
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2 : 00000000001000000000111110110011;
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3 : 00000000001000001000000010110011;
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4 : 00000000000100000000111110110011;
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5 : 00000000000100010000000100110011;
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6 : 00000000001000000000111110110011;
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7 : 00000000100000000000000001100111;
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[8..255] : 00000000000000000000000000000000;
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END;
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