Add verilator waiver file

data/verilator_waiver.vlt

@@ -0,0 +1,7 @@
+`verilator_config
+// Bits [1:0] in i_ibus_rdt are not used at all
+lint_off -rule UNUSED -file "*/serv_top.v" -lines 51
+
+//Some bits in the instruction word are not used in serv_decode but it's easier
+//to just send in the whole word than picking out bits
+lint_off -rule UNUSED -file "*/serv_decode.v" -lines 6

serv.core

@@ -5,6 +5,7 @@ name : ::serv:1.0.2
 filesets:
   core:
     files:
+      - "tool_verilator? (data/verilator_waiver.vlt)" : {file_type: vlt}
       - rtl/serv_params.vh : {is_include_file : true}
       - rtl/serv_bufreg.v
       - rtl/serv_alu.v