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Sync up quartus-specific RAM to regular RAM module
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1 changed files with 6 additions and 1 deletions
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@ -3,8 +3,10 @@ module servant_ram
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#(//Memory parameters
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parameter depth = 256,
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parameter aw = $clog2(depth),
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parameter RESET_STRATEGY = "",
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parameter memfile = "")
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(input wire i_wb_clk,
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input wire i_wb_rst,
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input wire [aw-1:2] i_wb_adr,
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input wire [31:0] i_wb_dat,
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input wire [3:0] i_wb_sel,
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@ -20,7 +22,10 @@ module servant_ram
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wire [aw-3:0] addr = i_wb_adr[aw-1:2];
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always @(posedge i_wb_clk)
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o_wb_ack <= i_wb_cyc & !o_wb_ack;
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if (i_wb_rst & (RESET_STRATEGY != "NONE"))
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o_wb_ack <= 1'b0;
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else
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o_wb_ack <= i_wb_cyc & !o_wb_ack;
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always_ff @(posedge i_wb_clk) begin
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if(we) begin
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