github-mirrors/serv
1
0
Fork 0
mirror of https://github.com/olofk/serv.git synced 2025-04-22 04:47:16 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

path correction and little comment (#12)

Browse source 
* path fixed

* Update README.md

Little comment to says that simulation should be stopped with Ctrl-C.

* Update README.md

adding dependencies

* Update README.md
This commit is contained in:
Fabien Marteau 2019-11-05 10:05:00 +01:00 • committed by Olof Kindgren
parent 9c83e39635
commit 529cf6192b
1 changed files with 19 additions and 6 deletions
Download patch file Download diff file Expand all files Collapse all files

25
README.md
View file

@ -35,22 +35,22 @@ Check that the CPU passes the linter
## Running test software
Build and run the single threaded zephyr hello world example with verilator
Build and run the single threaded zephyr hello world example with verilator (should be stopped with Ctrl-C):
cd $SERV/workspace
fusesoc run --target=verilator_tb servant --uart_baudrate=57600 --firmware=$SERV/sw/zephyr_hello.hex
fusesoc run --target=verilator_tb servant --uart_baudrate=57600 --firmware=$SERV/serv/sw/zephyr_hello.hex
..or... the multithreaded version
fusesoc run --target=verilator_tb servant --uart_baudrate=57600 --firmware=$SERV/sw/zephyr_hello_mt.hex --memsize=16384
fusesoc run --target=verilator_tb servant --uart_baudrate=57600 --firmware=$SERV/serv/sw/zephyr_hello_mt.hex --memsize=16384
...or... the philosophers example
fusesoc run --target=verilator_tb servant --uart_baudrate=57600 --firmware=$SERV/sw/zephyr_phil.hex --memsize=32768
fusesoc run --target=verilator_tb servant --uart_baudrate=57600 --firmware=$SERV/serv/sw/zephyr_phil.hex --memsize=32768
...or... the synchronization example
fusesoc run --target=verilator_tb servant --uart_baudrate=57600 --firmware=$SERV/sw/zephyr_sync.hex --memsize=16384
fusesoc run --target=verilator_tb servant --uart_baudrate=57600 --firmware=$SERV/serv/sw/zephyr_sync.hex --memsize=16384
Other applications can be tested by compiling and converting to bin and then hex e.g. with makehex.py found in `$SERV/serv/riscv-target/serv`
@ -70,7 +70,20 @@ Run the compliance tests
## Run on hardware
Only supported so far is a single threaded Zephyr hello world example on the icebreaker and tinyFPGA BX boards
Only supported so far is a single threaded Zephyr hello world example on the icebreaker and tinyFPGA BX boards. Some
packages should be installed before running it (and shoud be accessible in your PATH variable):
- [icestorm](https://github.com/cliffordwolf/icestorm).
- [nextpnr](https://github.com/YosysHQ/nextpnr).
And do not forget to add fusesoc-cores in your fusesoc lib :
- locally:
```
fusesoc library add fusesoc-cores https://github.com/fusesoc/fusesoc-cores
```
- globally:
```
fusesoc library add --global fusesoc-cores https://github.com/fusesoc/fusesoc-cores
```
### TinyFPGA BX