Add Alhambra board to repo (#23)

* Add Alhambra preliminary pcf

* Add Alhambra to targets

* Fix uart pin number

* Update synth values

* Fix clock values

* Add Alhambra board to Readme

* Make small explanation about Alhambra baud rate

README.md

@@ -76,7 +76,7 @@ The servant SoC has been ported to a number of different FPGA boards. To see all
 
 By default, these targets have the program memory preloaded with a small Zephyr hello world example that writes its output on a UART pin. Don't forget to install the appropriate toolchain (e.g. icestorm, Vivado, Quartus...) and add to your PATH
 
-Some targets also depend on functionality in the FuseSoC base library (fusesoc-cores). Running `fusesoc library list` should tell you if fusesoc-cores is already available. If not, add it to your workspace with 
+Some targets also depend on functionality in the FuseSoC base library (fusesoc-cores). Running `fusesoc library list` should tell you if fusesoc-cores is already available. If not, add it to your workspace with
 
     fusesoc library add fusesoc-cores https://github.com/fusesoc/fusesoc-cores
 
@@ -107,6 +107,13 @@ blinky.hex change D10 to H5 (led[4]) in data/arty_a7_35t.xdc).
     cd $SERV/workspace
     fusesoc run --target=arty_a7_35t servant
 
+### Alhambra II
+
+Pin 61 is used for UART output with 38400 baud rate (note that it works with non-standard 43200 value too). This pin is connected to a FT2232H chip in board, that manages the communications between the FPGA and the computer.
+
+    cd $SERV/workspace
+    fusesoc run --target=alhambra servant
+    iceprog -d i:0x0403:0x6010:0 build/servant_1.0.1/alhambra-icestorm/servant_1.0.1.bin
 
 ## Other targets
 

data/alhambra.pcf

@@ -0,0 +1,5 @@
+# 12 MHz clock
+set_io i_clk        49
+
+# RS232
+set_io q 61

servant.core

@@ -45,6 +45,7 @@ filesets:
 
   tinyfpga_bx: {files: [data/tinyfpga_bx.pcf : {file_type : PCF}]}
   icebreaker : {files: [data/icebreaker.pcf  : {file_type : PCF}]}
+  alhambra   : {files: [data/alhambra.pcf : {file_type : PCF}]}
 
   nexys_a7:
     files:
@@ -107,6 +108,18 @@ targets:
         pnr: next
     toplevel : service
 
+  alhambra:
+    default_tool : icestorm
+    description: Open-hardware iCE40HX4K FPGA board
+    filesets : [mem_files, soc, service, alhambra]
+    generate: [alhambra_pll]
+    parameters : [memfile, memsize, PLL=ICE40_CORE]
+    tools:
+      icestorm:
+        nextpnr_options : [--hx8k, --package, tq144:4k, --freq, 16]
+        pnr: next
+    toplevel : service
+
   lint:
     default_tool : verilator
     filesets : [soc]
@@ -246,3 +259,9 @@ generate:
     parameters:
       freq_in  : 16
       freq_out : 32
+
+  alhambra_pll:
+    generator: icepll
+    parameters:
+      freq_in  : 12
+      freq_out : 16