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dbe5236b4c
References: - https://github.com/fusesoc/blinky/pull/68/files (EBAZ4205 blinky) - https://github.com/fusesoc/blinky#ebaz4205-development-board - Existing 'arty_a7_35t' example This PR also cleans up a bunch of whitespace issues (no functional change).
30 lines
555 B
Verilog
30 lines
555 B
Verilog
`default_nettype none
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module servix_ebaz4205
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(
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input wire i_clk,
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output wire q);
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parameter frequency = 32;
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parameter memfile = "zephyr_hello.hex";
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parameter memsize = 8192;
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parameter PLL = "NONE";
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wire wb_clk;
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wire wb_rst;
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servix_ebaz4205_clock_gen
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#(.frequency (frequency))
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clock_gen
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(.i_clk (i_clk),
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.o_clk (wb_clk),
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.o_rst (wb_rst));
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servant
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#(.memfile (memfile),
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.memsize (memsize))
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servant
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(.wb_clk (wb_clk),
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.wb_rst (wb_rst),
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.q (q));
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endmodule
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