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f0f2dba67f
This adds the --trace_pc option to dump the PC after each instruction to a file called trace.bin
31 lines
540 B
Verilog
31 lines
540 B
Verilog
`default_nettype none
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module servant_tb;
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parameter memfile = "";
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parameter memsize = 8192;
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parameter with_csr = 1;
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reg wb_clk = 1'b0;
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reg wb_rst = 1'b1;
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wire q;
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always #31 wb_clk <= !wb_clk;
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initial #62 wb_rst <= 1'b0;
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vlog_tb_utils vtu();
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uart_decoder #(57600) uart_decoder (q);
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servant_sim
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#(.memfile (memfile),
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.memsize (memsize),
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.with_csr (with_csr))
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dut
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(.wb_clk (wb_clk),
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.wb_rst (wb_rst),
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.pc_adr (),
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.pc_vld (),
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.q (q));
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endmodule
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