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Olof Kindgren 40000cbeb9 Fix IRQ 
This contains a lot of fixes as IRQ support was broken on both
RTL and zephyr side

* Interrupts are now synced to instruction lifetimes
* Interrupts are disabled on traps and mie is pushed to mpie
* Zephyr applications regenerated from rewritten Zephyr port
* Timer is 32-bit to avoid wrapping around too often
* MEPC was not read properly from CSR storage
2019-11-19 11:06:50 +01:00
..
blinky.hex Add support for setting memory contents during synthesis 2018-11-26 09:49:08 +01:00
blinky.S Add support for setting memory contents during synthesis 2018-11-26 09:49:08 +01:00
link.ld Add support for setting memory contents during synthesis 2018-11-26 09:49:08 +01:00
Makefile Add support for setting memory contents during synthesis 2018-11-26 09:49:08 +01:00
makehex.py Add support for setting memory contents during synthesis 2018-11-26 09:49:08 +01:00
zephyr_hello.hex Fix IRQ 2019-11-19 11:06:50 +01:00
zephyr_hello_mt.hex Fix IRQ 2019-11-19 11:06:50 +01:00
zephyr_phil.hex Fix IRQ 2019-11-19 11:06:50 +01:00
zephyr_sync.hex Fix IRQ 2019-11-19 11:06:50 +01:00