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minor update
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parent
16f1f24a62
commit
07f6667b66
3 changed files with 30 additions and 5 deletions
21
hw/rtl/libs/VX_sat_fx.v
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21
hw/rtl/libs/VX_sat_fx.v
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@ -0,0 +1,21 @@
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`include "VX_platform.vh"
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module VX_sat_fx #(
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parameter IN_W = 1,
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parameter OUT_W = 1,
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parameter MODEL = 1
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) (
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input wire [IN_W-1:0] data_in,
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output wire [OUT_W-1:0] data_out
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);
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`STATIC_ASSERT(((OUT_W+1) < IN_W), ("invalid parameter"))
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if (MODEL == 1) begin
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assign data_out = data_in[IN_W-1] ? OUT_W'(0) : ((data_in > {OUT_W{1'b1}}) ? {OUT_W{1'b1}} : OUT_W'(data_in));
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end else begin
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wire [OUT_W-1:0] underflow_mask = {OUT_W{~data_in[IN_W-1]}};
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wire [OUT_W-1:0] overflow_mask = {OUT_W{(| data_in[IN_W-2:OUT_W])}};
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assign data_out = (data_in[OUT_W-1:0] | overflow_mask) & underflow_mask;
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end
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endmodule
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@ -9,8 +9,6 @@
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`define FIXED_HALF (`FIXED_ONE >> 1)
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`define FIXED_MASK (`FIXED_ONE - 1)
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`define CLAMP(x,lo,hi) (($signed(x) < $signed(lo)) ? lo : ((x > hi) ? hi : x))
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`define TEX_ADDR_BITS 32
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`define TEX_FORMAT_BITS 3
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`define TEX_WRAP_BITS 2
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@ -12,14 +12,20 @@ module VX_tex_wrap #(
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reg [`FIXED_FRAC-1:0] coord_r;
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wire [31:0] clamp = `CLAMP(coord_i, 0, `FIXED_MASK);
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wire [`FIXED_FRAC-1:0] clamp;
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`UNUSED_VAR (clamp)
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VX_sat_fx #(
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.IN_W (32),
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.OUT_W (`FIXED_FRAC)
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) sat_fx (
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.data_in (coord_i),
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.data_out (clamp)
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);
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always @(*) begin
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case (wrap_i)
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`TEX_WRAP_CLAMP:
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coord_r = clamp[`FIXED_FRAC-1:0];
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coord_r = clamp;
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`TEX_WRAP_MIRROR:
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coord_r = coord_i[`FIXED_FRAC-1:0] ^ {`FIXED_FRAC{coord_i[`FIXED_FRAC]}};
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default: //`TEX_WRAP_REPEAT
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