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minor update

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This commit is contained in:
Blaise Tine 2021-07-30 16:01:22 -07:00
parent 3d19588e57
commit 160ff94a22
2 changed files with 41 additions and 0 deletions
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20
hw/rtl/libs/VX_bits_insert.v Normal file
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`include "VX_platform.vh"
module VX_bits_insert #(
parameter N = 1,
parameter S = 1,
parameter POS = 0
) (
input wire [N-1:0] data_in,
input wire [S-1:0] sel_in,
output wire [N+S-1:0] data_out
);
if (POS == 0) begin
assign data_out = {data_in, sel_in};
end else if (POS == N) begin
assign data_out = {sel_in, data_in};
end else begin
assign data_out = {data_in[N-1:POS], sel_in, data_in[POS-1:0]};
end
endmodule

21
hw/rtl/libs/VX_bits_remove.v Normal file
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`include "VX_platform.vh"
module VX_bits_remove #(
parameter N = 1,
parameter S = 1,
parameter POS = 0
) (
input wire [N-1:0] data_in,
output wire [N-S-1:0] data_out
);
`UNUSED_VAR (data_in)
if (POS == 0) begin
assign data_out = data_in[N-1:S];
end else if (POS == N) begin
assign data_out = data_in[N-S-1:0];
end else begin
assign data_out = {data_in[N-1:(POS+S)], data_in[POS-1:0]};
end
endmodule