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This commit is contained in:
felsabbagh3 2019-04-05 17:56:05 -04:00
parent 719ed25213
commit 166b9ae48d
44 changed files with 79 additions and 4687 deletions
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10
kernel/Makefile
View file

@ -1,9 +1,13 @@
COMP = /opt/riscv/bin/riscv32-unknown-elf-gcc
# COMP = /opt/riscv/bin/riscv32-unknown-elf-gcc
COMP = /opt/riscv/bin/riscv32-unknown-linux-gnu-gcc
CC_FLAGS = -march=rv32im -mabi=ilp32 -O0 -Wl,-Bstatic,-T,linker.ld -ffreestanding -nostdlib
DMP = /opt/riscv/bin/riscv32-unknown-elf-objdump
CPY = /opt/riscv/bin/riscv32-unknown-elf-objcopy
# DMP = /opt/riscv/bin/riscv32-unknown-elf-objdump
# CPY = /opt/riscv/bin/riscv32-unknown-elf-objcopy
DMP = /opt/riscv/bin/riscv32-unknown-linux-gnu-objdump
CPY = /opt/riscv/bin/riscv32-unknown-linux-gnu-objcopy
VX_LIB = ./vx_os/vx_back/vx_back.s ./vx_os/vx_back/vx_back.c ./vx_os/vx_util/queue.s
VX_IO = ./vx_os/vx_io/vx_io.s ./vx_os/vx_io/vx_io.c

26
kernel/vortex_test.dump
View file

@ -7,7 +7,7 @@ Disassembly of section .text:
80000000 <_start>:
80000000: 00100513 li a0,1
80000004: 02051073 csrw 0x20,a0
80000008: 00800513 li a0,8
80000008: 00100513 li a0,1
8000000c: 02151073 csrw 0x21,a0
80000010: f1401073 csrw mhartid,zero
80000014: 30101073 csrw misa,zero
@ -1516,7 +1516,7 @@ Disassembly of section .text:
80001630: 00178793 addi a5,a5,1
80001634: fef42623 sw a5,-20(s0)
80001638: fec42703 lw a4,-20(s0)
8000163c: 0ff00793 li a5,255
8000163c: 03f00793 li a5,63
80001640: fae7dae3 bge a5,a4,800015f4 <initialize_mats+0x14>
80001644: 00000013 nop
80001648: 01c12403 lw s0,28(sp)
@ -1537,7 +1537,7 @@ Disassembly of section .text:
8000167c: fec42783 lw a5,-20(s0)
80001680: 00078e63 beqz a5,8000169c <print_matrix+0x48>
80001684: fec42783 lw a5,-20(s0)
80001688: 00f7f793 andi a5,a5,15
80001688: 0077f793 andi a5,a5,7
8000168c: 00079863 bnez a5,8000169c <print_matrix+0x48>
80001690: 810007b7 lui a5,0x81000
80001694: 13478513 addi a0,a5,308 # 81000134 <main_sp+0xffffa730>
@ -1556,7 +1556,7 @@ Disassembly of section .text:
800016c8: 00178793 addi a5,a5,1
800016cc: fef42623 sw a5,-20(s0)
800016d0: fec42703 lw a4,-20(s0)
800016d4: 0ff00793 li a5,255
800016d4: 03f00793 li a5,63
800016d8: fae7d2e3 bge a5,a4,8000167c <print_matrix+0x28>
800016dc: 810007b7 lui a5,0x81000
800016e0: 13c78513 addi a0,a5,316 # 8100013c <main_sp+0xffffa738>
@ -1573,7 +1573,7 @@ Disassembly of section .text:
80001704: 00812c23 sw s0,24(sp)
80001708: 02010413 addi s0,sp,32
8000170c: ed5ff0ef jal ra,800015e0 <initialize_mats>
80001710: 01000693 li a3,16
80001710: 00800693 li a3,8
80001714: 810057b7 lui a5,0x81005
80001718: 9e878613 addi a2,a5,-1560 # 810049e8 <main_sp+0xffffefe4>
8000171c: 810047b7 lui a5,0x81004
@ -1587,8 +1587,8 @@ Disassembly of section .text:
8000173c: 810057b7 lui a5,0x81005
80001740: 9e878513 addi a0,a5,-1560 # 810049e8 <main_sp+0xffffefe4>
80001744: f11ff0ef jal ra,80001654 <print_matrix>
80001748: 01000713 li a4,16
8000174c: 01000693 li a3,16
80001748: 00800713 li a4,8
8000174c: 00800693 li a3,8
80001750: 810057b7 lui a5,0x81005
80001754: 9e878613 addi a2,a5,-1560 # 810049e8 <main_sp+0xffffefe4>
80001758: 810047b7 lui a5,0x81004
@ -1602,8 +1602,8 @@ Disassembly of section .text:
80001778: 810057b7 lui a5,0x81005
8000177c: 9e878513 addi a0,a5,-1560 # 810049e8 <main_sp+0xffffefe4>
80001780: ed5ff0ef jal ra,80001654 <print_matrix>
80001784: 01000713 li a4,16
80001788: 01000693 li a3,16
80001784: 00800713 li a4,8
80001788: 00800693 li a3,8
8000178c: 810057b7 lui a5,0x81005
80001790: 9e878613 addi a2,a5,-1560 # 810049e8 <main_sp+0xffffefe4>
80001794: 810047b7 lui a5,0x81004
@ -1620,8 +1620,8 @@ Disassembly of section .text:
800017c0: 00300793 li a5,3
800017c4: fef42623 sw a5,-20(s0)
800017c8: fec40593 addi a1,s0,-20
800017cc: 01000713 li a4,16
800017d0: 01000693 li a3,16
800017cc: 00800713 li a4,8
800017d0: 00800693 li a3,8
800017d4: 810057b7 lui a5,0x81005
800017d8: 9e878613 addi a2,a5,-1560 # 810049e8 <main_sp+0xffffefe4>
800017dc: 810057b7 lui a5,0x81005
@ -1634,8 +1634,8 @@ Disassembly of section .text:
800017f8: 9e878513 addi a0,a5,-1560 # 810049e8 <main_sp+0xffffefe4>
800017fc: e59ff0ef jal ra,80001654 <print_matrix>
80001800: fec40593 addi a1,s0,-20
80001804: 01000713 li a4,16
80001808: 01000693 li a3,16
80001804: 00800713 li a4,8
80001808: 00800693 li a3,8
8000180c: 810057b7 lui a5,0x81005
80001810: 9e878613 addi a2,a5,-1560 # 810049e8 <main_sp+0xffffefe4>
80001814: 810057b7 lui a5,0x81005

BIN
kernel/vortex_test.elf
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Binary file not shown.

20
kernel/vortex_test.hex
View file

@ -1,5 +1,5 @@
:0200000480007A
:10000000130510007310050213058000731015020C
:10000000130510007310050213051000731015027C
:10001000731040F17310103037F1FF7FEF0080193B
:10002000EF10C06D73000000938B0600130D0700E6
:10003000130F01009303050013051000635C7500A6
@ -354,36 +354,36 @@
:101600009387879EB307F7001307300023A0E700F6
:10161000B74700810327C4FE131727009387879ECF
:10162000B307F7001307200023A0E7008327C4FEB9
:10163000938717002326F4FE0327C4FE9307F00FB9
:10163000938717002326F4FE0327C4FE9307F003C5
:10164000E3DAE7FA130000000324C10113010102E9
:1016500067800000130101FD23261102232481026B
:1016600013040103232EA4FCB7070081138507117F
:10167000EFF00F8C232604FE6F0080058327C4FE45
:10168000638E07008327C4FE93F7F7006398070073
:10168000638E07008327C4FE93F7770063980700F3
:10169000B707008113854713EFF08F898327C4FEB6
:1016A000939727000327C4FDB307F70083A707001C
:1016B00013850700EFF08F8BB70700811385871321
:1016C000EFF00F878327C4FE938717002326F4FECD
:1016D0000327C4FE9307F00FE3D2E7FAB7070081B0
:1016D0000327C4FE9307F003E3D2E7FAB7070081BC
:1016E0001385C713EFF0CF84130000008320C102DD
:1016F000032481021301010367800000130101FE2E
:10170000232E1100232C810013040102EFF05FED62
:1017100093060001B75700811386879EB747008163
:1017100093068000B75700811386879EB7470081E4
:101720009385879EB73700811385879EEFF0CF940E
:10173000B707008113850716EFE09FFFB7570081B9
:101740001385879EEFF01FF1130700019306000138
:101740001385879EEFF01FF113078000930680003A
:10175000B75700811386879EB74700819385879E80
:10176000B73700811385879EEFF00FC1B70700815F
:101770001385C717EFE0DFFBB75700811385879EFE
:10178000EFF05FED1307000193060001B7570081EA
:10178000EFF05FED1307800093068000B7570081EC
:101790001386879EB74700819385879EB737008160
:1017A0001385879EEFF04FE7B70700811385071970
:1017B000EFE01FF8B75700811385879EEFF09FE990
:1017C000930730002326F4FE9305C4FE130700019F
:1017D00093060001B75700811386879EB757008193
:1017C000930730002326F4FE9305C4FE1307800020
:1017D00093068000B75700811386879EB757008114
:1017E0001385879EEFF05F8DB70700811385871AF9
:1017F000EFE01FF4B75700811385879EEFF09FE558
:101800009305C4FE1307000193060001B75700813A
:101800009305C4FE1307800093068000B75700813C
:101810001386879EB75700811385879EEFF01FB30D
:10182000B70700811385871AEFE09FF0B757008153
:101830001385879EEFF01FE29307000013850700D2

6
kernel/vx_main.c
View file

@ -5,10 +5,10 @@ unsigned x[1024] = {0};
unsigned y[1024] = {0};
unsigned z[1024] = {0};
#define MAT_DIM 16
#define MAT_DIM 8
#define NUM_COLS 16
#define NUM_ROWS 16
#define NUM_COLS 8
#define NUM_ROWS 8
void initialize_mats()
{

2
kernel/vx_os/vx_back/vx_back.s
View file

@ -8,7 +8,7 @@
_start:
li a0, 1 # Num Warps
csrw 0x20, a0 # Setting the number of available warps
li a0, 8 # Num Threads
li a0, 1 # Num Threads
csrw 0x21, a0 # Setting the number of available threads
csrw mhartid,zero
csrw misa,zero

3068
rtl/obj_dir/VVX_decode.cpp
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File diff suppressed because it is too large Load diff

152
rtl/obj_dir/VVX_decode.h
View file

@ -1,152 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Primary design header
//
// This header should be included by all source files instantiating the design.
// The class here is then constructed to instantiate the design.
// See the Verilator manual for examples.
#ifndef _VVX_decode_H_
#define _VVX_decode_H_
#include "verilated_heavy.h"
class VVX_decode__Syms;
//----------
VL_MODULE(VVX_decode) {
public:
// PORTS
// The application code writes and reads these signals to
// propagate new values into/out from the Verilated model.
// Begin mtask footprint all:
VL_IN8(clk,0,0);
VL_IN8(in_rd,4,0);
VL_IN8(in_wb,1,0);
VL_IN8(in_src1_fwd,0,0);
VL_IN8(in_src2_fwd,0,0);
VL_OUT8(out_is_csr,0,0);
VL_OUT8(out_rd,4,0);
VL_OUT8(out_rs1,4,0);
VL_OUT8(out_rs2,4,0);
VL_OUT8(out_wb,1,0);
VL_OUT8(out_alu_op,4,0);
VL_OUT8(out_rs2_src,0,0);
VL_OUT8(out_mem_read,2,0);
VL_OUT8(out_mem_write,2,0);
VL_OUT8(out_branch_type,2,0);
VL_OUT8(out_branch_stall,0,0);
VL_OUT8(out_jal,0,0);
VL_OUT8(out_clone_stall,0,0);
VL_OUT16(out_csr_address,11,0);
VL_IN(in_instruction,31,0);
VL_IN(in_curr_PC,31,0);
VL_OUT(out_csr_mask,31,0);
VL_OUT(out_itype_immed,31,0);
VL_OUT(out_jal_offset,31,0);
VL_OUT(out_upper_immed,19,0);
VL_OUT(out_PC_next,31,0);
VL_IN8(in_valid[5],0,0);
VL_IN(in_write_data[5],31,0);
VL_IN8(in_wb_valid[5],0,0);
VL_IN(in_src1_fwd_data[5],31,0);
VL_IN(in_src2_fwd_data[5],31,0);
VL_OUT(out_a_reg_data[5],31,0);
VL_OUT(out_b_reg_data[5],31,0);
VL_OUT8(out_valid[5],0,0);
// LOCAL SIGNALS
// Internals; generally not touched by application code
// Begin mtask footprint all:
VL_SIG8(VX_decode__DOT__is_itype,0,0);
VL_SIG8(VX_decode__DOT__is_csr,0,0);
VL_SIG8(VX_decode__DOT__is_clone,0,0);
VL_SIG8(VX_decode__DOT__mul_alu,4,0);
VL_SIG8(VX_decode__DOT__state_stall,2,0);
VL_SIG8(VX_decode__DOT__temp_final_alu,4,0);
VL_SIG16(VX_decode__DOT__jalr_immed,11,0);
VL_SIG16(VX_decode__DOT__alu_tempp,11,0);
VL_SIG(VX_decode__DOT__rd1_register[5],31,0);
VL_SIG(VX_decode__DOT__rd2_register[5],31,0);
VL_SIG(VX_decode__DOT__clone_regsiters[32],31,0);
VL_SIG(VX_decode__DOT__vx_register_file_master__DOT__registers[32],31,0);
VL_SIG(VX_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0);
VL_SIG(VX_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0);
VL_SIG(VX_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0);
VL_SIG(VX_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0);
// LOCAL VARIABLES
// Internals; generally not touched by application code
// Begin mtask footprint all:
VL_SIG8(__Vtableidx1,2,0);
VL_SIG8(__Vclklast__TOP__clk,0,0);
VL_SIG(VX_decode__DOT____Vcellout__vx_register_file_master__out_src2_data,31,0);
VL_SIG(VX_decode__DOT____Vcellout__vx_register_file_master__out_src1_data,31,0);
VL_SIG(VX_decode__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(VX_decode__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(VX_decode__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(VX_decode__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(VX_decode__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(VX_decode__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(VX_decode__DOT____Vcellout__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(VX_decode__DOT____Vcellout__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(VX_decode__DOT____Vcellout__vx_register_file_master__out_regs[32],31,0);
VL_SIG(VX_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[32],31,0);
VL_SIG(VX_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[32],31,0);
VL_SIG(VX_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[32],31,0);
VL_SIG(VX_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[32],31,0);
static VL_ST_SIG8(__Vtable1_VX_decode__DOT__mul_alu[8],4,0);
// INTERNAL VARIABLES
// Internals; generally not touched by application code
VVX_decode__Syms* __VlSymsp; // Symbol table
// PARAMETERS
// Parameters marked /*verilator public*/ for use by application code
// CONSTRUCTORS
private:
VL_UNCOPYABLE(VVX_decode); ///< Copying not allowed
public:
/// Construct the model; called by application code
/// The special name may be used to make a wrapper with a
/// single model invisible with respect to DPI scope names.
VVX_decode(const char* name="TOP");
/// Destroy the model; called (often implicitly) by application code
~VVX_decode();
// API METHODS
/// Evaluate the model. Application must call when inputs change.
void eval();
/// Simulation complete, run final blocks. Application must call on completion.
void final();
// INTERNAL METHODS
private:
static void _eval_initial_loop(VVX_decode__Syms* __restrict vlSymsp);
public:
void __Vconfigure(VVX_decode__Syms* symsp, bool first);
private:
static QData _change_request(VVX_decode__Syms* __restrict vlSymsp);
public:
static void _combo__TOP__1(VVX_decode__Syms* __restrict vlSymsp);
static void _combo__TOP__6(VVX_decode__Syms* __restrict vlSymsp);
private:
void _ctor_var_reset();
public:
static void _eval(VVX_decode__Syms* __restrict vlSymsp);
private:
#ifdef VL_DEBUG
void _eval_debug_assertions();
#endif // VL_DEBUG
public:
static void _eval_initial(VVX_decode__Syms* __restrict vlSymsp);
static void _eval_settle(VVX_decode__Syms* __restrict vlSymsp);
static void _initial__TOP__5(VVX_decode__Syms* __restrict vlSymsp);
static void _sequent__TOP__3(VVX_decode__Syms* __restrict vlSymsp);
static void _sequent__TOP__4(VVX_decode__Syms* __restrict vlSymsp);
static void _settle__TOP__2(VVX_decode__Syms* __restrict vlSymsp);
} VL_ATTR_ALIGNED(128);
#endif // guard

53
rtl/obj_dir/VVX_decode.mk
View file

@ -1,53 +0,0 @@
# Verilated -*- Makefile -*-
# DESCRIPTION: Verilator output: Makefile for building Verilated archive or executable
#
# Execute this makefile from the object directory:
# make -f VVX_decode.mk
default: VVX_decode__ALL.a
### Constants...
# Perl executable (from $PERL)
PERL = perl
# Path to Verilator kit (from $VERILATOR_ROOT)
VERILATOR_ROOT = /usr/local/Cellar/verilator/4.010/share/verilator
# SystemC include directory with systemc.h (from $SYSTEMC_INCLUDE)
SYSTEMC_INCLUDE ?=
# SystemC library directory with libsystemc.a (from $SYSTEMC_LIBDIR)
SYSTEMC_LIBDIR ?=
### Switches...
# SystemC output mode? 0/1 (from --sc)
VM_SC = 0
# Legacy or SystemC output mode? 0/1 (from --sc)
VM_SP_OR_SC = $(VM_SC)
# Deprecated
VM_PCLI = 1
# Deprecated: SystemC architecture to find link library path (from $SYSTEMC_ARCH)
VM_SC_TARGET_ARCH = linux
### Vars...
# Design prefix (from --prefix)
VM_PREFIX = VVX_decode
# Module prefix (from --prefix)
VM_MODPREFIX = VVX_decode
# User CFLAGS (from -CFLAGS on Verilator command line)
VM_USER_CFLAGS = \
# User LDLIBS (from -LDFLAGS on Verilator command line)
VM_USER_LDLIBS = \
# User .cpp files (from .cpp's on Verilator command line)
VM_USER_CLASSES = \
# User .cpp directories (from .cpp's on Verilator command line)
VM_USER_DIR = \
### Default rules...
# Include list of all generated classes
include VVX_decode_classes.mk
# Include global rules
include $(VERILATOR_ROOT)/include/verilated.mk
# Verilated -*- Makefile -*-

19
rtl/obj_dir/VVX_decode__Syms.cpp
View file

@ -1,19 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Symbol table implementation internals
#include "VVX_decode__Syms.h"
#include "VVX_decode.h"
// FUNCTIONS
VVX_decode__Syms::VVX_decode__Syms(VVX_decode* topp, const char* namep)
// Setup locals
: __Vm_namep(namep)
, __Vm_didInit(false)
// Setup submodule names
{
// Pointer to top level
TOPp = topp;
// Setup each module's pointers to their submodules
// Setup each module's pointer back to symbol table (for public functions)
TOPp->__Vconfigure(this, true);
}

34
rtl/obj_dir/VVX_decode__Syms.h
View file

@ -1,34 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Symbol table internal header
//
// Internal details; most calling programs do not need this header
#ifndef _VVX_decode__Syms_H_
#define _VVX_decode__Syms_H_
#include "verilated_heavy.h"
// INCLUDE MODULE CLASSES
#include "VVX_decode.h"
// SYMS CLASS
class VVX_decode__Syms : public VerilatedSyms {
public:
// LOCAL STATE
const char* __Vm_namep;
bool __Vm_didInit;
// SUBCELL STATE
VVX_decode* TOPp;
// CREATORS
VVX_decode__Syms(VVX_decode* topp, const char* namep);
~VVX_decode__Syms() {}
// METHODS
inline const char* name() { return __Vm_namep; }
} VL_ATTR_ALIGNED(64);
#endif // guard

1
rtl/obj_dir/VVX_decode__ver.d
View file

@ -1 +0,0 @@
obj_dir/VVX_decode.cpp obj_dir/VVX_decode.h obj_dir/VVX_decode.mk obj_dir/VVX_decode__Syms.cpp obj_dir/VVX_decode__Syms.h obj_dir/VVX_decode__ver.d obj_dir/VVX_decode_classes.mk : /usr/local/Cellar/verilator/4.010/bin/verilator_bin /usr/local/Cellar/verilator/4.010/bin/verilator_bin VX_decode.v VX_define.v VX_register_file.v VX_register_file_slave.v

15
rtl/obj_dir/VVX_decode__verFiles.dat
View file

@ -1,15 +0,0 @@
# DESCRIPTION: Verilator output: Timestamp data for --skip-identical. Delete at will.
C "VX_decode.v -cc"
S 4608404 12889046060 1553037052 0 1548678579 0 "/usr/local/Cellar/verilator/4.010/bin/verilator_bin"
S 12482 12889419225 1554012698 0 1554012698 0 "VX_decode.v"
S 1557 12889419227 1554008503 0 1554008503 0 "VX_define.v"
S 1075 12889419229 1554007548 0 1554007548 0 "VX_register_file.v"
S 1209 12889437241 1554012117 0 1554012117 0 "VX_register_file_slave.v"
T 191649 12889446512 1554012701 0 1554012701 0 "obj_dir/VVX_decode.cpp"
T 6700 12889446511 1554012701 0 1554012701 0 "obj_dir/VVX_decode.h"
T 1476 12889446514 1554012701 0 1554012701 0 "obj_dir/VVX_decode.mk"
T 545 12889446510 1554012701 0 1554012701 0 "obj_dir/VVX_decode__Syms.cpp"
T 738 12889446509 1554012701 0 1554012701 0 "obj_dir/VVX_decode__Syms.h"
T 356 12889446515 1554012701 0 1554012701 0 "obj_dir/VVX_decode__ver.d"
T 0 0 1554012701 0 1554012701 0 "obj_dir/VVX_decode__verFiles.dat"
T 1168 12889446513 1554012701 0 1554012701 0 "obj_dir/VVX_decode_classes.mk"

38
rtl/obj_dir/VVX_decode_classes.mk
View file

@ -1,38 +0,0 @@
# Verilated -*- Makefile -*-
# DESCRIPTION: Verilator output: Make include file with class lists
#
# This file lists generated Verilated files, for including in higher level makefiles.
# See VVX_decode.mk for the caller.
### Switches...
# Coverage output mode? 0/1 (from --coverage)
VM_COVERAGE = 0
# Threaded output mode? 0/1/N threads (from --threads)
VM_THREADS = 0
# Tracing output mode? 0/1 (from --trace)
VM_TRACE = 0
### Object file lists...
# Generated module classes, fast-path, compile with highest optimization
VM_CLASSES_FAST += \
VVX_decode \
# Generated module classes, non-fast-path, compile with low/medium optimization
VM_CLASSES_SLOW += \
# Generated support classes, fast-path, compile with highest optimization
VM_SUPPORT_FAST += \
# Generated support classes, non-fast-path, compile with low/medium optimization
VM_SUPPORT_SLOW += \
VVX_decode__Syms \
# Global classes, need linked once per executable, fast-path, compile with highest optimization
VM_GLOBAL_FAST += \
verilated \
# Global classes, need linked once per executable, non-fast-path, compile with low/medium optimization
VM_GLOBAL_SLOW += \
# Verilated -*- Makefile -*-

348
rtl/obj_dir/VVX_register_file.cpp
View file

@ -1,348 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See VVX_register_file.h for the primary calling header
#include "VVX_register_file.h"
#include "VVX_register_file__Syms.h"
//--------------------
// STATIC VARIABLES
//--------------------
VL_CTOR_IMP(VVX_register_file) {
VVX_register_file__Syms* __restrict vlSymsp = __VlSymsp = new VVX_register_file__Syms(this, name());
VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Reset internal values
// Reset structure values
_ctor_var_reset();
}
void VVX_register_file::__Vconfigure(VVX_register_file__Syms* vlSymsp, bool first) {
if (0 && first) {} // Prevent unused
this->__VlSymsp = vlSymsp;
}
VVX_register_file::~VVX_register_file() {
delete __VlSymsp; __VlSymsp=NULL;
}
//--------------------
void VVX_register_file::eval() {
VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate VVX_register_file::eval\n"); );
VVX_register_file__Syms* __restrict vlSymsp = this->__VlSymsp; // Setup global symbol table
VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
#ifdef VL_DEBUG
// Debug assertions
_eval_debug_assertions();
#endif // VL_DEBUG
// Initialize
if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) _eval_initial_loop(vlSymsp);
// Evaluate till stable
int __VclockLoop = 0;
QData __Vchange = 1;
do {
VL_DEBUG_IF(VL_DBG_MSGF("+ Clock loop\n"););
_eval(vlSymsp);
if (VL_UNLIKELY(++__VclockLoop > 100)) {
// About to fail, so enable debug to see what's not settling.
// Note you must run make with OPT=-DVL_DEBUG for debug prints.
int __Vsaved_debug = Verilated::debug();
Verilated::debug(1);
__Vchange = _change_request(vlSymsp);
Verilated::debug(__Vsaved_debug);
VL_FATAL_MT(__FILE__,__LINE__,__FILE__,"Verilated model didn't converge");
} else {
__Vchange = _change_request(vlSymsp);
}
} while (VL_UNLIKELY(__Vchange));
}
void VVX_register_file::_eval_initial_loop(VVX_register_file__Syms* __restrict vlSymsp) {
vlSymsp->__Vm_didInit = true;
_eval_initial(vlSymsp);
// Evaluate till stable
int __VclockLoop = 0;
QData __Vchange = 1;
do {
_eval_settle(vlSymsp);
_eval(vlSymsp);
if (VL_UNLIKELY(++__VclockLoop > 100)) {
// About to fail, so enable debug to see what's not settling.
// Note you must run make with OPT=-DVL_DEBUG for debug prints.
int __Vsaved_debug = Verilated::debug();
Verilated::debug(1);
__Vchange = _change_request(vlSymsp);
Verilated::debug(__Vsaved_debug);
VL_FATAL_MT(__FILE__,__LINE__,__FILE__,"Verilated model didn't DC converge");
} else {
__Vchange = _change_request(vlSymsp);
}
} while (VL_UNLIKELY(__Vchange));
}
//--------------------
// Internal Methods
VL_INLINE_OPT void VVX_register_file::_sequent__TOP__1(VVX_register_file__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::_sequent__TOP__1\n"); );
VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Body
// ALWAYS at VX_register_file.v:46
vlTOPp->out_src1_data = vlTOPp->VX_register_file__DOT__registers
[vlTOPp->in_src1];
// ALWAYS at VX_register_file.v:46
vlTOPp->out_src2_data = vlTOPp->VX_register_file__DOT__registers
[vlTOPp->in_src2];
}
VL_INLINE_OPT void VVX_register_file::_sequent__TOP__2(VVX_register_file__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::_sequent__TOP__2\n"); );
VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Variables
// Begin mtask footprint all:
VL_SIG8(__Vdlyvdim0__VX_register_file__DOT__registers__v0,4,0);
VL_SIG8(__Vdlyvset__VX_register_file__DOT__registers__v0,0,0);
VL_SIG(__Vdlyvval__VX_register_file__DOT__registers__v0,31,0);
// Body
__Vdlyvset__VX_register_file__DOT__registers__v0 = 0U;
// ALWAYS at VX_register_file.v:39
if (VL_UNLIKELY((((IData)(vlTOPp->in_write_register)
& (0U != (IData)(vlTOPp->in_rd)))
& (IData)(vlTOPp->in_valid)))) {
VL_WRITEF("RF: Writing %x to %2#\n",32,vlTOPp->in_data,
5,(IData)(vlTOPp->in_rd));
__Vdlyvval__VX_register_file__DOT__registers__v0
= vlTOPp->in_data;
__Vdlyvset__VX_register_file__DOT__registers__v0 = 1U;
__Vdlyvdim0__VX_register_file__DOT__registers__v0
= vlTOPp->in_rd;
}
// ALWAYSPOST at VX_register_file.v:42
if (__Vdlyvset__VX_register_file__DOT__registers__v0) {
vlTOPp->VX_register_file__DOT__registers[__Vdlyvdim0__VX_register_file__DOT__registers__v0]
= __Vdlyvval__VX_register_file__DOT__registers__v0;
}
vlTOPp->out_regs[0x1fU] = vlTOPp->VX_register_file__DOT__registers
[0x1fU];
vlTOPp->out_regs[0x1eU] = vlTOPp->VX_register_file__DOT__registers
[0x1eU];
vlTOPp->out_regs[0x1dU] = vlTOPp->VX_register_file__DOT__registers
[0x1dU];
vlTOPp->out_regs[0x1cU] = vlTOPp->VX_register_file__DOT__registers
[0x1cU];
vlTOPp->out_regs[0x1bU] = vlTOPp->VX_register_file__DOT__registers
[0x1bU];
vlTOPp->out_regs[0x1aU] = vlTOPp->VX_register_file__DOT__registers
[0x1aU];
vlTOPp->out_regs[0x19U] = vlTOPp->VX_register_file__DOT__registers
[0x19U];
vlTOPp->out_regs[0x18U] = vlTOPp->VX_register_file__DOT__registers
[0x18U];
vlTOPp->out_regs[0x17U] = vlTOPp->VX_register_file__DOT__registers
[0x17U];
vlTOPp->out_regs[0x16U] = vlTOPp->VX_register_file__DOT__registers
[0x16U];
vlTOPp->out_regs[0x15U] = vlTOPp->VX_register_file__DOT__registers
[0x15U];
vlTOPp->out_regs[0x14U] = vlTOPp->VX_register_file__DOT__registers
[0x14U];
vlTOPp->out_regs[0x13U] = vlTOPp->VX_register_file__DOT__registers
[0x13U];
vlTOPp->out_regs[0x12U] = vlTOPp->VX_register_file__DOT__registers
[0x12U];
vlTOPp->out_regs[0x11U] = vlTOPp->VX_register_file__DOT__registers
[0x11U];
vlTOPp->out_regs[0x10U] = vlTOPp->VX_register_file__DOT__registers
[0x10U];
vlTOPp->out_regs[0xfU] = vlTOPp->VX_register_file__DOT__registers
[0xfU];
vlTOPp->out_regs[0xeU] = vlTOPp->VX_register_file__DOT__registers
[0xeU];
vlTOPp->out_regs[0xdU] = vlTOPp->VX_register_file__DOT__registers
[0xdU];
vlTOPp->out_regs[0xcU] = vlTOPp->VX_register_file__DOT__registers
[0xcU];
vlTOPp->out_regs[0xbU] = vlTOPp->VX_register_file__DOT__registers
[0xbU];
vlTOPp->out_regs[0xaU] = vlTOPp->VX_register_file__DOT__registers
[0xaU];
vlTOPp->out_regs[9U] = vlTOPp->VX_register_file__DOT__registers
[9U];
vlTOPp->out_regs[8U] = vlTOPp->VX_register_file__DOT__registers
[8U];
vlTOPp->out_regs[7U] = vlTOPp->VX_register_file__DOT__registers
[7U];
vlTOPp->out_regs[6U] = vlTOPp->VX_register_file__DOT__registers
[6U];
vlTOPp->out_regs[5U] = vlTOPp->VX_register_file__DOT__registers
[5U];
vlTOPp->out_regs[4U] = vlTOPp->VX_register_file__DOT__registers
[4U];
vlTOPp->out_regs[3U] = vlTOPp->VX_register_file__DOT__registers
[3U];
vlTOPp->out_regs[2U] = vlTOPp->VX_register_file__DOT__registers
[2U];
vlTOPp->out_regs[1U] = vlTOPp->VX_register_file__DOT__registers
[1U];
vlTOPp->out_regs[0U] = vlTOPp->VX_register_file__DOT__registers
[0U];
}
void VVX_register_file::_settle__TOP__3(VVX_register_file__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::_settle__TOP__3\n"); );
VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Body
vlTOPp->out_regs[0x1fU] = vlTOPp->VX_register_file__DOT__registers
[0x1fU];
vlTOPp->out_regs[0x1eU] = vlTOPp->VX_register_file__DOT__registers
[0x1eU];
vlTOPp->out_regs[0x1dU] = vlTOPp->VX_register_file__DOT__registers
[0x1dU];
vlTOPp->out_regs[0x1cU] = vlTOPp->VX_register_file__DOT__registers
[0x1cU];
vlTOPp->out_regs[0x1bU] = vlTOPp->VX_register_file__DOT__registers
[0x1bU];
vlTOPp->out_regs[0x1aU] = vlTOPp->VX_register_file__DOT__registers
[0x1aU];
vlTOPp->out_regs[0x19U] = vlTOPp->VX_register_file__DOT__registers
[0x19U];
vlTOPp->out_regs[0x18U] = vlTOPp->VX_register_file__DOT__registers
[0x18U];
vlTOPp->out_regs[0x17U] = vlTOPp->VX_register_file__DOT__registers
[0x17U];
vlTOPp->out_regs[0x16U] = vlTOPp->VX_register_file__DOT__registers
[0x16U];
vlTOPp->out_regs[0x15U] = vlTOPp->VX_register_file__DOT__registers
[0x15U];
vlTOPp->out_regs[0x14U] = vlTOPp->VX_register_file__DOT__registers
[0x14U];
vlTOPp->out_regs[0x13U] = vlTOPp->VX_register_file__DOT__registers
[0x13U];
vlTOPp->out_regs[0x12U] = vlTOPp->VX_register_file__DOT__registers
[0x12U];
vlTOPp->out_regs[0x11U] = vlTOPp->VX_register_file__DOT__registers
[0x11U];
vlTOPp->out_regs[0x10U] = vlTOPp->VX_register_file__DOT__registers
[0x10U];
vlTOPp->out_regs[0xfU] = vlTOPp->VX_register_file__DOT__registers
[0xfU];
vlTOPp->out_regs[0xeU] = vlTOPp->VX_register_file__DOT__registers
[0xeU];
vlTOPp->out_regs[0xdU] = vlTOPp->VX_register_file__DOT__registers
[0xdU];
vlTOPp->out_regs[0xcU] = vlTOPp->VX_register_file__DOT__registers
[0xcU];
vlTOPp->out_regs[0xbU] = vlTOPp->VX_register_file__DOT__registers
[0xbU];
vlTOPp->out_regs[0xaU] = vlTOPp->VX_register_file__DOT__registers
[0xaU];
vlTOPp->out_regs[9U] = vlTOPp->VX_register_file__DOT__registers
[9U];
vlTOPp->out_regs[8U] = vlTOPp->VX_register_file__DOT__registers
[8U];
vlTOPp->out_regs[7U] = vlTOPp->VX_register_file__DOT__registers
[7U];
vlTOPp->out_regs[6U] = vlTOPp->VX_register_file__DOT__registers
[6U];
vlTOPp->out_regs[5U] = vlTOPp->VX_register_file__DOT__registers
[5U];
vlTOPp->out_regs[4U] = vlTOPp->VX_register_file__DOT__registers
[4U];
vlTOPp->out_regs[3U] = vlTOPp->VX_register_file__DOT__registers
[3U];
vlTOPp->out_regs[2U] = vlTOPp->VX_register_file__DOT__registers
[2U];
vlTOPp->out_regs[1U] = vlTOPp->VX_register_file__DOT__registers
[1U];
vlTOPp->out_regs[0U] = vlTOPp->VX_register_file__DOT__registers
[0U];
}
void VVX_register_file::_eval(VVX_register_file__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::_eval\n"); );
VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Body
if (((~ (IData)(vlTOPp->clk)) & (IData)(vlTOPp->__Vclklast__TOP__clk))) {
vlTOPp->_sequent__TOP__1(vlSymsp);
}
if (((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk)))) {
vlTOPp->_sequent__TOP__2(vlSymsp);
}
// Final
vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk;
}
void VVX_register_file::_eval_initial(VVX_register_file__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::_eval_initial\n"); );
VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Body
vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk;
}
void VVX_register_file::final() {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::final\n"); );
// Variables
VVX_register_file__Syms* __restrict vlSymsp = this->__VlSymsp;
VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
}
void VVX_register_file::_eval_settle(VVX_register_file__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::_eval_settle\n"); );
VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Body
vlTOPp->_settle__TOP__3(vlSymsp);
}
VL_INLINE_OPT QData VVX_register_file::_change_request(VVX_register_file__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::_change_request\n"); );
VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Body
// Change detection
QData __req = false; // Logically a bool
return __req;
}
#ifdef VL_DEBUG
void VVX_register_file::_eval_debug_assertions() {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::_eval_debug_assertions\n"); );
// Body
if (VL_UNLIKELY((clk & 0xfeU))) {
Verilated::overWidthError("clk");}
if (VL_UNLIKELY((in_valid & 0xfeU))) {
Verilated::overWidthError("in_valid");}
if (VL_UNLIKELY((in_write_register & 0xfeU))) {
Verilated::overWidthError("in_write_register");}
if (VL_UNLIKELY((in_rd & 0xe0U))) {
Verilated::overWidthError("in_rd");}
if (VL_UNLIKELY((in_src1 & 0xe0U))) {
Verilated::overWidthError("in_src1");}
if (VL_UNLIKELY((in_src2 & 0xe0U))) {
Verilated::overWidthError("in_src2");}
}
#endif // VL_DEBUG
void VVX_register_file::_ctor_var_reset() {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::_ctor_var_reset\n"); );
// Body
clk = VL_RAND_RESET_I(1);
in_valid = VL_RAND_RESET_I(1);
in_write_register = VL_RAND_RESET_I(1);
in_rd = VL_RAND_RESET_I(5);
in_data = VL_RAND_RESET_I(32);
in_src1 = VL_RAND_RESET_I(5);
in_src2 = VL_RAND_RESET_I(5);
{ int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
out_regs[__Vi0] = VL_RAND_RESET_I(32);
}}
out_src1_data = VL_RAND_RESET_I(32);
out_src2_data = VL_RAND_RESET_I(32);
{ int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
VX_register_file__DOT__registers[__Vi0] = VL_RAND_RESET_I(32);
}}
}

91
rtl/obj_dir/VVX_register_file.h
View file

@ -1,91 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Primary design header
//
// This header should be included by all source files instantiating the design.
// The class here is then constructed to instantiate the design.
// See the Verilator manual for examples.
#ifndef _VVX_register_file_H_
#define _VVX_register_file_H_
#include "verilated_heavy.h"
class VVX_register_file__Syms;
//----------
VL_MODULE(VVX_register_file) {
public:
// PORTS
// The application code writes and reads these signals to
// propagate new values into/out from the Verilated model.
// Begin mtask footprint all:
VL_IN8(clk,0,0);
VL_IN8(in_valid,0,0);
VL_IN8(in_write_register,0,0);
VL_IN8(in_rd,4,0);
VL_IN8(in_src1,4,0);
VL_IN8(in_src2,4,0);
VL_IN(in_data,31,0);
VL_OUT(out_src1_data,31,0);
VL_OUT(out_src2_data,31,0);
VL_OUT(out_regs[32],31,0);
// LOCAL SIGNALS
// Internals; generally not touched by application code
// Begin mtask footprint all:
VL_SIG(VX_register_file__DOT__registers[32],31,0);
// LOCAL VARIABLES
// Internals; generally not touched by application code
// Begin mtask footprint all:
VL_SIG8(__Vclklast__TOP__clk,0,0);
// INTERNAL VARIABLES
// Internals; generally not touched by application code
VVX_register_file__Syms* __VlSymsp; // Symbol table
// PARAMETERS
// Parameters marked /*verilator public*/ for use by application code
// CONSTRUCTORS
private:
VL_UNCOPYABLE(VVX_register_file); ///< Copying not allowed
public:
/// Construct the model; called by application code
/// The special name may be used to make a wrapper with a
/// single model invisible with respect to DPI scope names.
VVX_register_file(const char* name="TOP");
/// Destroy the model; called (often implicitly) by application code
~VVX_register_file();
// API METHODS
/// Evaluate the model. Application must call when inputs change.
void eval();
/// Simulation complete, run final blocks. Application must call on completion.
void final();
// INTERNAL METHODS
private:
static void _eval_initial_loop(VVX_register_file__Syms* __restrict vlSymsp);
public:
void __Vconfigure(VVX_register_file__Syms* symsp, bool first);
private:
static QData _change_request(VVX_register_file__Syms* __restrict vlSymsp);
void _ctor_var_reset();
public:
static void _eval(VVX_register_file__Syms* __restrict vlSymsp);
private:
#ifdef VL_DEBUG
void _eval_debug_assertions();
#endif // VL_DEBUG
public:
static void _eval_initial(VVX_register_file__Syms* __restrict vlSymsp);
static void _eval_settle(VVX_register_file__Syms* __restrict vlSymsp);
static void _sequent__TOP__1(VVX_register_file__Syms* __restrict vlSymsp);
static void _sequent__TOP__2(VVX_register_file__Syms* __restrict vlSymsp);
static void _settle__TOP__3(VVX_register_file__Syms* __restrict vlSymsp);
} VL_ATTR_ALIGNED(128);
#endif // guard

53
rtl/obj_dir/VVX_register_file.mk
View file

@ -1,53 +0,0 @@
# Verilated -*- Makefile -*-
# DESCRIPTION: Verilator output: Makefile for building Verilated archive or executable
#
# Execute this makefile from the object directory:
# make -f VVX_register_file.mk
default: VVX_register_file__ALL.a
### Constants...
# Perl executable (from $PERL)
PERL = perl
# Path to Verilator kit (from $VERILATOR_ROOT)
VERILATOR_ROOT = /usr/local/Cellar/verilator/4.010/share/verilator
# SystemC include directory with systemc.h (from $SYSTEMC_INCLUDE)
SYSTEMC_INCLUDE ?=
# SystemC library directory with libsystemc.a (from $SYSTEMC_LIBDIR)
SYSTEMC_LIBDIR ?=
### Switches...
# SystemC output mode? 0/1 (from --sc)
VM_SC = 0
# Legacy or SystemC output mode? 0/1 (from --sc)
VM_SP_OR_SC = $(VM_SC)
# Deprecated
VM_PCLI = 1
# Deprecated: SystemC architecture to find link library path (from $SYSTEMC_ARCH)
VM_SC_TARGET_ARCH = linux
### Vars...
# Design prefix (from --prefix)
VM_PREFIX = VVX_register_file
# Module prefix (from --prefix)
VM_MODPREFIX = VVX_register_file
# User CFLAGS (from -CFLAGS on Verilator command line)
VM_USER_CFLAGS = \
# User LDLIBS (from -LDFLAGS on Verilator command line)
VM_USER_LDLIBS = \
# User .cpp files (from .cpp's on Verilator command line)
VM_USER_CLASSES = \
# User .cpp directories (from .cpp's on Verilator command line)
VM_USER_DIR = \
### Default rules...
# Include list of all generated classes
include VVX_register_file_classes.mk
# Include global rules
include $(VERILATOR_ROOT)/include/verilated.mk
# Verilated -*- Makefile -*-

19
rtl/obj_dir/VVX_register_file__Syms.cpp
View file

@ -1,19 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Symbol table implementation internals
#include "VVX_register_file__Syms.h"
#include "VVX_register_file.h"
// FUNCTIONS
VVX_register_file__Syms::VVX_register_file__Syms(VVX_register_file* topp, const char* namep)
// Setup locals
: __Vm_namep(namep)
, __Vm_didInit(false)
// Setup submodule names
{
// Pointer to top level
TOPp = topp;
// Setup each module's pointers to their submodules
// Setup each module's pointer back to symbol table (for public functions)
TOPp->__Vconfigure(this, true);
}

34
rtl/obj_dir/VVX_register_file__Syms.h
View file

@ -1,34 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Symbol table internal header
//
// Internal details; most calling programs do not need this header
#ifndef _VVX_register_file__Syms_H_
#define _VVX_register_file__Syms_H_
#include "verilated_heavy.h"
// INCLUDE MODULE CLASSES
#include "VVX_register_file.h"
// SYMS CLASS
class VVX_register_file__Syms : public VerilatedSyms {
public:
// LOCAL STATE
const char* __Vm_namep;
bool __Vm_didInit;
// SUBCELL STATE
VVX_register_file* TOPp;
// CREATORS
VVX_register_file__Syms(VVX_register_file* topp, const char* namep);
~VVX_register_file__Syms() {}
// METHODS
inline const char* name() { return __Vm_namep; }
} VL_ATTR_ALIGNED(64);
#endif // guard

1
rtl/obj_dir/VVX_register_file__ver.d
View file

@ -1 +0,0 @@
obj_dir/VVX_register_file.cpp obj_dir/VVX_register_file.h obj_dir/VVX_register_file.mk obj_dir/VVX_register_file__Syms.cpp obj_dir/VVX_register_file__Syms.h obj_dir/VVX_register_file__ver.d obj_dir/VVX_register_file_classes.mk : /usr/local/Cellar/verilator/4.010/bin/verilator_bin /usr/local/Cellar/verilator/4.010/bin/verilator_bin VX_register_file.v

12
rtl/obj_dir/VVX_register_file__verFiles.dat
View file

@ -1,12 +0,0 @@
# DESCRIPTION: Verilator output: Timestamp data for --skip-identical. Delete at will.
C "VX_register_file.v -cc"
S 4608404 12889046060 1553037052 0 1548678579 0 "/usr/local/Cellar/verilator/4.010/bin/verilator_bin"
S 1075 12889419229 1554007548 0 1554007548 0 "VX_register_file.v"
T 13053 12889437111 1554007562 0 1554007562 0 "obj_dir/VVX_register_file.cpp"
T 3056 12889437110 1554007562 0 1554007562 0 "obj_dir/VVX_register_file.h"
T 1511 12889437113 1554007562 0 1554007562 0 "obj_dir/VVX_register_file.mk"
T 580 12889437109 1554007562 0 1554007562 0 "obj_dir/VVX_register_file__Syms.cpp"
T 787 12889437108 1554007562 0 1554007562 0 "obj_dir/VVX_register_file__Syms.h"
T 356 12889437114 1554007562 0 1554007562 0 "obj_dir/VVX_register_file__ver.d"
T 0 0 1554007562 0 1554007562 0 "obj_dir/VVX_register_file__verFiles.dat"
T 1189 12889437112 1554007562 0 1554007562 0 "obj_dir/VVX_register_file_classes.mk"

38
rtl/obj_dir/VVX_register_file_classes.mk
View file

@ -1,38 +0,0 @@
# Verilated -*- Makefile -*-
# DESCRIPTION: Verilator output: Make include file with class lists
#
# This file lists generated Verilated files, for including in higher level makefiles.
# See VVX_register_file.mk for the caller.
### Switches...
# Coverage output mode? 0/1 (from --coverage)
VM_COVERAGE = 0
# Threaded output mode? 0/1/N threads (from --threads)
VM_THREADS = 0
# Tracing output mode? 0/1 (from --trace)
VM_TRACE = 0
### Object file lists...
# Generated module classes, fast-path, compile with highest optimization
VM_CLASSES_FAST += \
VVX_register_file \
# Generated module classes, non-fast-path, compile with low/medium optimization
VM_CLASSES_SLOW += \
# Generated support classes, fast-path, compile with highest optimization
VM_SUPPORT_FAST += \
# Generated support classes, non-fast-path, compile with low/medium optimization
VM_SUPPORT_SLOW += \
VVX_register_file__Syms \
# Global classes, need linked once per executable, fast-path, compile with highest optimization
VM_GLOBAL_FAST += \
verilated \
# Global classes, need linked once per executable, non-fast-path, compile with low/medium optimization
VM_GLOBAL_SLOW += \
# Verilated -*- Makefile -*-

384
rtl/obj_dir/VVX_register_file_slave.cpp
View file

@ -1,384 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See VVX_register_file_slave.h for the primary calling header
#include "VVX_register_file_slave.h"
#include "VVX_register_file_slave__Syms.h"
//--------------------
// STATIC VARIABLES
//--------------------
VL_CTOR_IMP(VVX_register_file_slave) {
VVX_register_file_slave__Syms* __restrict vlSymsp = __VlSymsp = new VVX_register_file_slave__Syms(this, name());
VVX_register_file_slave* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Reset internal values
// Reset structure values
_ctor_var_reset();
}
void VVX_register_file_slave::__Vconfigure(VVX_register_file_slave__Syms* vlSymsp, bool first) {
if (0 && first) {} // Prevent unused
this->__VlSymsp = vlSymsp;
}
VVX_register_file_slave::~VVX_register_file_slave() {
delete __VlSymsp; __VlSymsp=NULL;
}
//--------------------
void VVX_register_file_slave::eval() {
VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate VVX_register_file_slave::eval\n"); );
VVX_register_file_slave__Syms* __restrict vlSymsp = this->__VlSymsp; // Setup global symbol table
VVX_register_file_slave* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
#ifdef VL_DEBUG
// Debug assertions
_eval_debug_assertions();
#endif // VL_DEBUG
// Initialize
if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) _eval_initial_loop(vlSymsp);
// Evaluate till stable
int __VclockLoop = 0;
QData __Vchange = 1;
do {
VL_DEBUG_IF(VL_DBG_MSGF("+ Clock loop\n"););
_eval(vlSymsp);
if (VL_UNLIKELY(++__VclockLoop > 100)) {
// About to fail, so enable debug to see what's not settling.
// Note you must run make with OPT=-DVL_DEBUG for debug prints.
int __Vsaved_debug = Verilated::debug();
Verilated::debug(1);
__Vchange = _change_request(vlSymsp);
Verilated::debug(__Vsaved_debug);
VL_FATAL_MT(__FILE__,__LINE__,__FILE__,"Verilated model didn't converge");
} else {
__Vchange = _change_request(vlSymsp);
}
} while (VL_UNLIKELY(__Vchange));
}
void VVX_register_file_slave::_eval_initial_loop(VVX_register_file_slave__Syms* __restrict vlSymsp) {
vlSymsp->__Vm_didInit = true;
_eval_initial(vlSymsp);
// Evaluate till stable
int __VclockLoop = 0;
QData __Vchange = 1;
do {
_eval_settle(vlSymsp);
_eval(vlSymsp);
if (VL_UNLIKELY(++__VclockLoop > 100)) {
// About to fail, so enable debug to see what's not settling.
// Note you must run make with OPT=-DVL_DEBUG for debug prints.
int __Vsaved_debug = Verilated::debug();
Verilated::debug(1);
__Vchange = _change_request(vlSymsp);
Verilated::debug(__Vsaved_debug);
VL_FATAL_MT(__FILE__,__LINE__,__FILE__,"Verilated model didn't DC converge");
} else {
__Vchange = _change_request(vlSymsp);
}
} while (VL_UNLIKELY(__Vchange));
}
//--------------------
// Internal Methods
VL_INLINE_OPT void VVX_register_file_slave::_sequent__TOP__1(VVX_register_file_slave__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file_slave::_sequent__TOP__1\n"); );
VVX_register_file_slave* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Body
// ALWAYS at VX_register_file_slave.v:51
vlTOPp->out_src1_data = vlTOPp->VX_register_file_slave__DOT__registers
[vlTOPp->in_src1];
// ALWAYS at VX_register_file_slave.v:51
vlTOPp->out_src2_data = vlTOPp->VX_register_file_slave__DOT__registers
[vlTOPp->in_src2];
}
VL_INLINE_OPT void VVX_register_file_slave::_sequent__TOP__2(VVX_register_file_slave__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file_slave::_sequent__TOP__2\n"); );
VVX_register_file_slave* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Variables
// Begin mtask footprint all:
VL_SIG8(__Vdlyvdim0__VX_register_file_slave__DOT__registers__v0,4,0);
VL_SIG8(__Vdlyvset__VX_register_file_slave__DOT__registers__v0,0,0);
VL_SIG8(__Vdlyvset__VX_register_file_slave__DOT__registers__v1,0,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v0,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v1,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v2,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v3,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v4,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v5,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v6,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v7,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v8,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v9,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v10,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v11,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v12,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v13,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v14,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v15,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v16,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v17,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v18,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v19,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v20,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v21,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v22,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v23,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v24,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v25,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v26,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v27,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v28,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v29,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v30,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v31,31,0);
VL_SIG(__Vdlyvval__VX_register_file_slave__DOT__registers__v32,31,0);
// Body
__Vdlyvset__VX_register_file_slave__DOT__registers__v0 = 0U;
__Vdlyvset__VX_register_file_slave__DOT__registers__v1 = 0U;
// ALWAYS at VX_register_file_slave.v:42
if (VL_UNLIKELY(((((IData)(vlTOPp->in_write_register)
& (0U != (IData)(vlTOPp->in_rd)))
& (IData)(vlTOPp->in_valid))
& (~ (IData)(vlTOPp->in_clone))))) {
VL_WRITEF("RF: Writing %x to %2#\n",32,vlTOPp->in_data,
5,(IData)(vlTOPp->in_rd));
__Vdlyvval__VX_register_file_slave__DOT__registers__v0
= vlTOPp->in_data;
__Vdlyvset__VX_register_file_slave__DOT__registers__v0 = 1U;
__Vdlyvdim0__VX_register_file_slave__DOT__registers__v0
= vlTOPp->in_rd;
} else {
if (vlTOPp->in_clone) {
__Vdlyvval__VX_register_file_slave__DOT__registers__v1
= vlTOPp->in_regs[0x1fU];
__Vdlyvset__VX_register_file_slave__DOT__registers__v1 = 1U;
__Vdlyvval__VX_register_file_slave__DOT__registers__v2
= vlTOPp->in_regs[0x1eU];
__Vdlyvval__VX_register_file_slave__DOT__registers__v3
= vlTOPp->in_regs[0x1dU];
__Vdlyvval__VX_register_file_slave__DOT__registers__v4
= vlTOPp->in_regs[0x1cU];
__Vdlyvval__VX_register_file_slave__DOT__registers__v5
= vlTOPp->in_regs[0x1bU];
__Vdlyvval__VX_register_file_slave__DOT__registers__v6
= vlTOPp->in_regs[0x1aU];
__Vdlyvval__VX_register_file_slave__DOT__registers__v7
= vlTOPp->in_regs[0x19U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v8
= vlTOPp->in_regs[0x18U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v9
= vlTOPp->in_regs[0x17U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v10
= vlTOPp->in_regs[0x16U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v11
= vlTOPp->in_regs[0x15U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v12
= vlTOPp->in_regs[0x14U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v13
= vlTOPp->in_regs[0x13U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v14
= vlTOPp->in_regs[0x12U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v15
= vlTOPp->in_regs[0x11U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v16
= vlTOPp->in_regs[0x10U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v17
= vlTOPp->in_regs[0xfU];
__Vdlyvval__VX_register_file_slave__DOT__registers__v18
= vlTOPp->in_regs[0xeU];
__Vdlyvval__VX_register_file_slave__DOT__registers__v19
= vlTOPp->in_regs[0xdU];
__Vdlyvval__VX_register_file_slave__DOT__registers__v20
= vlTOPp->in_regs[0xcU];
__Vdlyvval__VX_register_file_slave__DOT__registers__v21
= vlTOPp->in_regs[0xbU];
__Vdlyvval__VX_register_file_slave__DOT__registers__v22
= vlTOPp->in_regs[0xaU];
__Vdlyvval__VX_register_file_slave__DOT__registers__v23
= vlTOPp->in_regs[9U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v24
= vlTOPp->in_regs[8U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v25
= vlTOPp->in_regs[7U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v26
= vlTOPp->in_regs[6U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v27
= vlTOPp->in_regs[5U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v28
= vlTOPp->in_regs[4U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v29
= vlTOPp->in_regs[3U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v30
= vlTOPp->in_regs[2U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v31
= vlTOPp->in_regs[1U];
__Vdlyvval__VX_register_file_slave__DOT__registers__v32
= vlTOPp->in_regs[0U];
}
}
// ALWAYSPOST at VX_register_file_slave.v:45
if (__Vdlyvset__VX_register_file_slave__DOT__registers__v0) {
vlTOPp->VX_register_file_slave__DOT__registers[__Vdlyvdim0__VX_register_file_slave__DOT__registers__v0]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v0;
}
if (__Vdlyvset__VX_register_file_slave__DOT__registers__v1) {
vlTOPp->VX_register_file_slave__DOT__registers[0x1fU]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v1;
vlTOPp->VX_register_file_slave__DOT__registers[0x1eU]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v2;
vlTOPp->VX_register_file_slave__DOT__registers[0x1dU]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v3;
vlTOPp->VX_register_file_slave__DOT__registers[0x1cU]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v4;
vlTOPp->VX_register_file_slave__DOT__registers[0x1bU]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v5;
vlTOPp->VX_register_file_slave__DOT__registers[0x1aU]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v6;
vlTOPp->VX_register_file_slave__DOT__registers[0x19U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v7;
vlTOPp->VX_register_file_slave__DOT__registers[0x18U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v8;
vlTOPp->VX_register_file_slave__DOT__registers[0x17U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v9;
vlTOPp->VX_register_file_slave__DOT__registers[0x16U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v10;
vlTOPp->VX_register_file_slave__DOT__registers[0x15U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v11;
vlTOPp->VX_register_file_slave__DOT__registers[0x14U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v12;
vlTOPp->VX_register_file_slave__DOT__registers[0x13U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v13;
vlTOPp->VX_register_file_slave__DOT__registers[0x12U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v14;
vlTOPp->VX_register_file_slave__DOT__registers[0x11U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v15;
vlTOPp->VX_register_file_slave__DOT__registers[0x10U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v16;
vlTOPp->VX_register_file_slave__DOT__registers[0xfU]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v17;
vlTOPp->VX_register_file_slave__DOT__registers[0xeU]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v18;
vlTOPp->VX_register_file_slave__DOT__registers[0xdU]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v19;
vlTOPp->VX_register_file_slave__DOT__registers[0xcU]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v20;
vlTOPp->VX_register_file_slave__DOT__registers[0xbU]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v21;
vlTOPp->VX_register_file_slave__DOT__registers[0xaU]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v22;
vlTOPp->VX_register_file_slave__DOT__registers[9U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v23;
vlTOPp->VX_register_file_slave__DOT__registers[8U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v24;
vlTOPp->VX_register_file_slave__DOT__registers[7U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v25;
vlTOPp->VX_register_file_slave__DOT__registers[6U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v26;
vlTOPp->VX_register_file_slave__DOT__registers[5U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v27;
vlTOPp->VX_register_file_slave__DOT__registers[4U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v28;
vlTOPp->VX_register_file_slave__DOT__registers[3U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v29;
vlTOPp->VX_register_file_slave__DOT__registers[2U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v30;
vlTOPp->VX_register_file_slave__DOT__registers[1U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v31;
vlTOPp->VX_register_file_slave__DOT__registers[0U]
= __Vdlyvval__VX_register_file_slave__DOT__registers__v32;
}
}
void VVX_register_file_slave::_eval(VVX_register_file_slave__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file_slave::_eval\n"); );
VVX_register_file_slave* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Body
if (((~ (IData)(vlTOPp->clk)) & (IData)(vlTOPp->__Vclklast__TOP__clk))) {
vlTOPp->_sequent__TOP__1(vlSymsp);
}
if (((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk)))) {
vlTOPp->_sequent__TOP__2(vlSymsp);
}
// Final
vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk;
}
void VVX_register_file_slave::_eval_initial(VVX_register_file_slave__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file_slave::_eval_initial\n"); );
VVX_register_file_slave* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Body
vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk;
}
void VVX_register_file_slave::final() {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file_slave::final\n"); );
// Variables
VVX_register_file_slave__Syms* __restrict vlSymsp = this->__VlSymsp;
VVX_register_file_slave* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
}
void VVX_register_file_slave::_eval_settle(VVX_register_file_slave__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file_slave::_eval_settle\n"); );
VVX_register_file_slave* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
}
VL_INLINE_OPT QData VVX_register_file_slave::_change_request(VVX_register_file_slave__Syms* __restrict vlSymsp) {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file_slave::_change_request\n"); );
VVX_register_file_slave* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
// Body
// Change detection
QData __req = false; // Logically a bool
return __req;
}
#ifdef VL_DEBUG
void VVX_register_file_slave::_eval_debug_assertions() {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file_slave::_eval_debug_assertions\n"); );
// Body
if (VL_UNLIKELY((clk & 0xfeU))) {
Verilated::overWidthError("clk");}
if (VL_UNLIKELY((in_valid & 0xfeU))) {
Verilated::overWidthError("in_valid");}
if (VL_UNLIKELY((in_write_register & 0xfeU))) {
Verilated::overWidthError("in_write_register");}
if (VL_UNLIKELY((in_rd & 0xe0U))) {
Verilated::overWidthError("in_rd");}
if (VL_UNLIKELY((in_src1 & 0xe0U))) {
Verilated::overWidthError("in_src1");}
if (VL_UNLIKELY((in_src2 & 0xe0U))) {
Verilated::overWidthError("in_src2");}
if (VL_UNLIKELY((in_clone & 0xfeU))) {
Verilated::overWidthError("in_clone");}
}
#endif // VL_DEBUG
void VVX_register_file_slave::_ctor_var_reset() {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file_slave::_ctor_var_reset\n"); );
// Body
clk = VL_RAND_RESET_I(1);
in_valid = VL_RAND_RESET_I(1);
in_write_register = VL_RAND_RESET_I(1);
in_rd = VL_RAND_RESET_I(5);
in_data = VL_RAND_RESET_I(32);
in_src1 = VL_RAND_RESET_I(5);
in_src2 = VL_RAND_RESET_I(5);
in_clone = VL_RAND_RESET_I(1);
{ int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
in_regs[__Vi0] = VL_RAND_RESET_I(32);
}}
out_src1_data = VL_RAND_RESET_I(32);
out_src2_data = VL_RAND_RESET_I(32);
{ int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
VX_register_file_slave__DOT__registers[__Vi0] = VL_RAND_RESET_I(32);
}}
}

91
rtl/obj_dir/VVX_register_file_slave.h
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@ -1,91 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Primary design header
//
// This header should be included by all source files instantiating the design.
// The class here is then constructed to instantiate the design.
// See the Verilator manual for examples.
#ifndef _VVX_register_file_slave_H_
#define _VVX_register_file_slave_H_
#include "verilated_heavy.h"
class VVX_register_file_slave__Syms;
//----------
VL_MODULE(VVX_register_file_slave) {
public:
// PORTS
// The application code writes and reads these signals to
// propagate new values into/out from the Verilated model.
// Begin mtask footprint all:
VL_IN8(clk,0,0);
VL_IN8(in_valid,0,0);
VL_IN8(in_write_register,0,0);
VL_IN8(in_rd,4,0);
VL_IN8(in_src1,4,0);
VL_IN8(in_src2,4,0);
VL_IN8(in_clone,0,0);
VL_IN(in_data,31,0);
VL_OUT(out_src1_data,31,0);
VL_OUT(out_src2_data,31,0);
VL_IN(in_regs[32],31,0);
// LOCAL SIGNALS
// Internals; generally not touched by application code
// Begin mtask footprint all:
VL_SIG(VX_register_file_slave__DOT__registers[32],31,0);
// LOCAL VARIABLES
// Internals; generally not touched by application code
// Begin mtask footprint all:
VL_SIG8(__Vclklast__TOP__clk,0,0);
// INTERNAL VARIABLES
// Internals; generally not touched by application code
VVX_register_file_slave__Syms* __VlSymsp; // Symbol table
// PARAMETERS
// Parameters marked /*verilator public*/ for use by application code
// CONSTRUCTORS
private:
VL_UNCOPYABLE(VVX_register_file_slave); ///< Copying not allowed
public:
/// Construct the model; called by application code
/// The special name may be used to make a wrapper with a
/// single model invisible with respect to DPI scope names.
VVX_register_file_slave(const char* name="TOP");
/// Destroy the model; called (often implicitly) by application code
~VVX_register_file_slave();
// API METHODS
/// Evaluate the model. Application must call when inputs change.
void eval();
/// Simulation complete, run final blocks. Application must call on completion.
void final();
// INTERNAL METHODS
private:
static void _eval_initial_loop(VVX_register_file_slave__Syms* __restrict vlSymsp);
public:
void __Vconfigure(VVX_register_file_slave__Syms* symsp, bool first);
private:
static QData _change_request(VVX_register_file_slave__Syms* __restrict vlSymsp);
void _ctor_var_reset();
public:
static void _eval(VVX_register_file_slave__Syms* __restrict vlSymsp);
private:
#ifdef VL_DEBUG
void _eval_debug_assertions();
#endif // VL_DEBUG
public:
static void _eval_initial(VVX_register_file_slave__Syms* __restrict vlSymsp);
static void _eval_settle(VVX_register_file_slave__Syms* __restrict vlSymsp);
static void _sequent__TOP__1(VVX_register_file_slave__Syms* __restrict vlSymsp);
static void _sequent__TOP__2(VVX_register_file_slave__Syms* __restrict vlSymsp);
} VL_ATTR_ALIGNED(128);
#endif // guard

53
rtl/obj_dir/VVX_register_file_slave.mk
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@ -1,53 +0,0 @@
# Verilated -*- Makefile -*-
# DESCRIPTION: Verilator output: Makefile for building Verilated archive or executable
#
# Execute this makefile from the object directory:
# make -f VVX_register_file_slave.mk
default: VVX_register_file_slave__ALL.a
### Constants...
# Perl executable (from $PERL)
PERL = perl
# Path to Verilator kit (from $VERILATOR_ROOT)
VERILATOR_ROOT = /usr/local/Cellar/verilator/4.010/share/verilator
# SystemC include directory with systemc.h (from $SYSTEMC_INCLUDE)
SYSTEMC_INCLUDE ?=
# SystemC library directory with libsystemc.a (from $SYSTEMC_LIBDIR)
SYSTEMC_LIBDIR ?=
### Switches...
# SystemC output mode? 0/1 (from --sc)
VM_SC = 0
# Legacy or SystemC output mode? 0/1 (from --sc)
VM_SP_OR_SC = $(VM_SC)
# Deprecated
VM_PCLI = 1
# Deprecated: SystemC architecture to find link library path (from $SYSTEMC_ARCH)
VM_SC_TARGET_ARCH = linux
### Vars...
# Design prefix (from --prefix)
VM_PREFIX = VVX_register_file_slave
# Module prefix (from --prefix)
VM_MODPREFIX = VVX_register_file_slave
# User CFLAGS (from -CFLAGS on Verilator command line)
VM_USER_CFLAGS = \
# User LDLIBS (from -LDFLAGS on Verilator command line)
VM_USER_LDLIBS = \
# User .cpp files (from .cpp's on Verilator command line)
VM_USER_CLASSES = \
# User .cpp directories (from .cpp's on Verilator command line)
VM_USER_DIR = \
### Default rules...
# Include list of all generated classes
include VVX_register_file_slave_classes.mk
# Include global rules
include $(VERILATOR_ROOT)/include/verilated.mk
# Verilated -*- Makefile -*-

19
rtl/obj_dir/VVX_register_file_slave__Syms.cpp
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@ -1,19 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Symbol table implementation internals
#include "VVX_register_file_slave__Syms.h"
#include "VVX_register_file_slave.h"
// FUNCTIONS
VVX_register_file_slave__Syms::VVX_register_file_slave__Syms(VVX_register_file_slave* topp, const char* namep)
// Setup locals
: __Vm_namep(namep)
, __Vm_didInit(false)
// Setup submodule names
{
// Pointer to top level
TOPp = topp;
// Setup each module's pointers to their submodules
// Setup each module's pointer back to symbol table (for public functions)
TOPp->__Vconfigure(this, true);
}

34
rtl/obj_dir/VVX_register_file_slave__Syms.h
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@ -1,34 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Symbol table internal header
//
// Internal details; most calling programs do not need this header
#ifndef _VVX_register_file_slave__Syms_H_
#define _VVX_register_file_slave__Syms_H_
#include "verilated_heavy.h"
// INCLUDE MODULE CLASSES
#include "VVX_register_file_slave.h"
// SYMS CLASS
class VVX_register_file_slave__Syms : public VerilatedSyms {
public:
// LOCAL STATE
const char* __Vm_namep;
bool __Vm_didInit;
// SUBCELL STATE
VVX_register_file_slave* TOPp;
// CREATORS
VVX_register_file_slave__Syms(VVX_register_file_slave* topp, const char* namep);
~VVX_register_file_slave__Syms() {}
// METHODS
inline const char* name() { return __Vm_namep; }
} VL_ATTR_ALIGNED(64);
#endif // guard

1
rtl/obj_dir/VVX_register_file_slave__ver.d
View file

@ -1 +0,0 @@
obj_dir/VVX_register_file_slave.cpp obj_dir/VVX_register_file_slave.h obj_dir/VVX_register_file_slave.mk obj_dir/VVX_register_file_slave__Syms.cpp obj_dir/VVX_register_file_slave__Syms.h obj_dir/VVX_register_file_slave__ver.d obj_dir/VVX_register_file_slave_classes.mk : /usr/local/Cellar/verilator/4.010/bin/verilator_bin /usr/local/Cellar/verilator/4.010/bin/verilator_bin VX_register_file_slave.v

12
rtl/obj_dir/VVX_register_file_slave__verFiles.dat
View file

@ -1,12 +0,0 @@
# DESCRIPTION: Verilator output: Timestamp data for --skip-identical. Delete at will.
C "VX_register_file_slave.v -cc"
S 4608404 12889046060 1553037052 0 1548678579 0 "/usr/local/Cellar/verilator/4.010/bin/verilator_bin"
S 1160 12889437241 1554007811 0 1554007811 0 "VX_register_file_slave.v"
T 17581 12889437306 1554007815 0 1554007815 0 "obj_dir/VVX_register_file_slave.cpp"
T 3104 12889437305 1554007815 0 1554007815 0 "obj_dir/VVX_register_file_slave.h"
T 1541 12889437308 1554007815 0 1554007815 0 "obj_dir/VVX_register_file_slave.mk"
T 610 12889437304 1554007815 0 1554007815 0 "obj_dir/VVX_register_file_slave__Syms.cpp"
T 829 12889437303 1554007815 0 1554007815 0 "obj_dir/VVX_register_file_slave__Syms.h"
T 404 12889437310 1554007815 0 1554007815 0 "obj_dir/VVX_register_file_slave__ver.d"
T 0 0 1554007815 0 1554007815 0 "obj_dir/VVX_register_file_slave__verFiles.dat"
T 1207 12889437307 1554007815 0 1554007815 0 "obj_dir/VVX_register_file_slave_classes.mk"

38
rtl/obj_dir/VVX_register_file_slave_classes.mk
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@ -1,38 +0,0 @@
# Verilated -*- Makefile -*-
# DESCRIPTION: Verilator output: Make include file with class lists
#
# This file lists generated Verilated files, for including in higher level makefiles.
# See VVX_register_file_slave.mk for the caller.
### Switches...
# Coverage output mode? 0/1 (from --coverage)
VM_COVERAGE = 0
# Threaded output mode? 0/1/N threads (from --threads)
VM_THREADS = 0
# Tracing output mode? 0/1 (from --trace)
VM_TRACE = 0
### Object file lists...
# Generated module classes, fast-path, compile with highest optimization
VM_CLASSES_FAST += \
VVX_register_file_slave \
# Generated module classes, non-fast-path, compile with low/medium optimization
VM_CLASSES_SLOW += \
# Generated support classes, fast-path, compile with highest optimization
VM_SUPPORT_FAST += \
# Generated support classes, non-fast-path, compile with low/medium optimization
VM_SUPPORT_SLOW += \
VVX_register_file_slave__Syms \
# Global classes, need linked once per executable, fast-path, compile with highest optimization
VM_GLOBAL_FAST += \
verilated \
# Global classes, need linked once per executable, non-fast-path, compile with low/medium optimization
VM_GLOBAL_SLOW += \
# Verilated -*- Makefile -*-

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2
rtl/obj_dir/VVortex.mk
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@ -10,7 +10,7 @@ default: VVortex
# Perl executable (from $PERL)
PERL = perl
# Path to Verilator kit (from $VERILATOR_ROOT)
VERILATOR_ROOT = /usr/local/Cellar/verilator/4.010/share/verilator
VERILATOR_ROOT = /usr/local/share/verilator
# SystemC include directory with systemc.h (from $SYSTEMC_INCLUDE)
SYSTEMC_INCLUDE ?=
# SystemC library directory with libsystemc.a (from $SYSTEMC_LIBDIR)

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rtl/obj_dir/VVortex__ALL.a
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5
rtl/obj_dir/VVortex__ALLcls.d
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@ -1,4 +1,3 @@
VVortex__ALLcls.o: VVortex__ALLcls.cpp VVortex.cpp VVortex.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h \
VVortex__Syms.h
/usr/local/share/verilator/include/verilated.h \
/usr/local/share/verilator/include/verilatedos.h VVortex__Syms.h

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rtl/obj_dir/VVortex__ALLcls.o
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5
rtl/obj_dir/VVortex__ALLsup.d
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@ -1,4 +1,3 @@
VVortex__ALLsup.o: VVortex__ALLsup.cpp VVortex__Syms.cpp VVortex__Syms.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h \
VVortex.h
/usr/local/share/verilator/include/verilated.h \
/usr/local/share/verilator/include/verilatedos.h VVortex.h

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rtl/obj_dir/VVortex__ALLsup.o
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2
rtl/obj_dir/VVortex__ver.d
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@ -1 +1 @@
obj_dir/VVortex.cpp obj_dir/VVortex.h obj_dir/VVortex.mk obj_dir/VVortex__Syms.cpp obj_dir/VVortex__Syms.h obj_dir/VVortex__ver.d obj_dir/VVortex_classes.mk : /usr/local/Cellar/verilator/4.010/bin/verilator_bin /usr/local/Cellar/verilator/4.010/bin/verilator_bin VX_alu.v VX_csr_handler.v VX_d_e_reg.v VX_decode.v VX_define.v VX_e_m_reg.v VX_execute.v VX_f_d_reg.v VX_fetch.v VX_forwarding.v VX_m_w_reg.v VX_memory.v VX_register_file.v VX_register_file_slave.v VX_writeback.v Vortex.v
obj_dir/VVortex.cpp obj_dir/VVortex.h obj_dir/VVortex.mk obj_dir/VVortex__Syms.cpp obj_dir/VVortex__Syms.h obj_dir/VVortex__ver.d obj_dir/VVortex_classes.mk : /usr/local/bin/verilator_bin /usr/local/bin/verilator_bin VX_alu.v VX_csr_handler.v VX_d_e_reg.v VX_decode.v VX_define.v VX_e_m_reg.v VX_execute.v VX_f_d_reg.v VX_fetch.v VX_forwarding.v VX_m_w_reg.v VX_memory.v VX_register_file.v VX_register_file_slave.v VX_writeback.v Vortex.v

50
rtl/obj_dir/VVortex__verFiles.dat
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@ -1,27 +1,27 @@
# DESCRIPTION: Verilator output: Timestamp data for --skip-identical. Delete at will.
C "-Wall -cc Vortex.v --exe test_bench.cpp"
S 4608404 12889046060 1553037052 0 1548678579 0 "/usr/local/Cellar/verilator/4.010/bin/verilator_bin"
S 2785 12889457986 1554064009 0 1554064009 0 "VX_alu.v"
S 1495 12889457987 1554023089 0 1554023089 0 "VX_csr_handler.v"
S 5105 12889457988 1554023089 0 1554023089 0 "VX_d_e_reg.v"
S 15102 12889457989 1554023916 0 1554023916 0 "VX_decode.v"
S 1557 12889457991 1554023528 0 1554023528 0 "VX_define.v"
S 4077 12889457992 1554023089 0 1554023089 0 "VX_e_m_reg.v"
S 3288 12889457993 1554023938 0 1554023938 0 "VX_execute.v"
S 1558 12889457994 1554064040 0 1554064040 0 "VX_f_d_reg.v"
S 4606 12889457995 1554023897 0 1554023897 0 "VX_fetch.v"
S 5632 12889457996 1554023089 0 1554023089 0 "VX_forwarding.v"
S 1677 12889457997 1554023089 0 1554023089 0 "VX_m_w_reg.v"
S 3035 12889457998 1554064111 0 1554064111 0 "VX_memory.v"
S 1078 12889457999 1554023928 0 1554023928 0 "VX_register_file.v"
S 1387 12889458000 1554023933 0 1554023933 0 "VX_register_file_slave.v"
S 1323 12889458001 1554023982 0 1554023982 0 "VX_writeback.v"
S 16910 12889458002 1554023089 0 1554023089 0 "Vortex.v"
T 778984 12889458029 1554064114 0 1554064114 0 "obj_dir/VVortex.cpp"
T 20905 12889458030 1554064114 0 1554064114 0 "obj_dir/VVortex.h"
T 1800 12889458031 1554064114 0 1554064114 0 "obj_dir/VVortex.mk"
T 530 12889458039 1554064114 0 1554064114 0 "obj_dir/VVortex__Syms.cpp"
T 711 12889458040 1554064114 0 1554064114 0 "obj_dir/VVortex__Syms.h"
T 489 12889458041 1554064114 0 1554064114 0 "obj_dir/VVortex__ver.d"
T 0 0 1554064114 0 1554064114 0 "obj_dir/VVortex__verFiles.dat"
T 1159 12889458043 1554064114 0 1554064114 0 "obj_dir/VVortex_classes.mk"
S 5163137 401094 1553636247 412576209 1553636247 412576209 "/usr/local/bin/verilator_bin"
S 2785 5518365 1554498824 810406070 1554498824 810406070 "VX_alu.v"
S 1495 5518326 1553635490 361093288 1553635490 361093288 "VX_csr_handler.v"
S 5105 5518327 1554498824 810406070 1554498824 810406070 "VX_d_e_reg.v"
S 15102 5518328 1554498824 810406070 1554498824 810406070 "VX_decode.v"
S 1557 5518330 1554498824 810406070 1554498824 810406070 "VX_define.v"
S 4077 5518331 1554498824 810406070 1554498824 810406070 "VX_e_m_reg.v"
S 3288 5518332 1554498824 810406070 1554498824 810406070 "VX_execute.v"
S 1558 5518333 1554498824 810406070 1554498824 810406070 "VX_f_d_reg.v"
S 4606 5518334 1554498824 810406070 1554498824 810406070 "VX_fetch.v"
S 5632 5518335 1553705050 153020819 1553705050 153020819 "VX_forwarding.v"
S 1677 5518336 1553705050 153020819 1553705050 153020819 "VX_m_w_reg.v"
S 3035 5518337 1554498824 810406070 1554498824 810406070 "VX_memory.v"
S 1078 5518338 1554498824 810406070 1554498824 810406070 "VX_register_file.v"
S 1387 5518394 1554498824 810406070 1554498824 810406070 "VX_register_file_slave.v"
S 1323 5518339 1554498824 810406070 1554498824 810406070 "VX_writeback.v"
S 16910 5518364 1554498824 810406070 1554498824 810406070 "Vortex.v"
T 778984 5518343 1554498868 802626708 1554498868 802626708 "obj_dir/VVortex.cpp"
T 20905 5518342 1554498868 782626608 1554498868 782626608 "obj_dir/VVortex.h"
T 1777 5518345 1554498868 802626708 1554498868 802626708 "obj_dir/VVortex.mk"
T 530 5518341 1554498868 782626608 1554498868 782626608 "obj_dir/VVortex__Syms.cpp"
T 711 5518340 1554498868 782626608 1554498868 782626608 "obj_dir/VVortex__Syms.h"
T 443 5518346 1554498868 802626708 1554498868 802626708 "obj_dir/VVortex__ver.d"
T 0 0 1554498868 802626708 1554498868 802626708 "obj_dir/VVortex__verFiles.dat"
T 1159 5518344 1554498868 802626708 1554498868 802626708 "obj_dir/VVortex_classes.mk"

5
rtl/obj_dir/test_bench.d
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@ -1,4 +1,3 @@
test_bench.o: ../test_bench.cpp ../test_bench.h ../VX_define.h ../ram.h \
VVortex.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h
VVortex.h /usr/local/share/verilator/include/verilated.h \
/usr/local/share/verilator/include/verilatedos.h

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rtl/obj_dir/test_bench.o
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17
rtl/obj_dir/verilated.d
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@ -1,9 +1,8 @@
verilated.o: \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.cpp \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_imp.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_heavy.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_syms.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_sym_props.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_config.h
verilated.o: /usr/local/share/verilator/include/verilated.cpp \
/usr/local/share/verilator/include/verilatedos.h \
/usr/local/share/verilator/include/verilated_imp.h \
/usr/local/share/verilator/include/verilated.h \
/usr/local/share/verilator/include/verilated_heavy.h \
/usr/local/share/verilator/include/verilated_syms.h \
/usr/local/share/verilator/include/verilated_sym_props.h \
/usr/local/share/verilator/include/verilated_config.h

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rtl/obj_dir/verilated.o
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8
rtl/results.txt
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@ -1,7 +1,7 @@
# Dynamic Instructions: 365972
# of total cycles: 365984
# Dynamic Instructions: 149108
# of total cycles: 149120
# of forwarding stalls: 0
# of branch stalls: 0
# CPI: 1.00003
# time to simulate: 6.95312e-310 milliseconds
# CPI: 1.00008
# time to simulate: 2.17658e-317 milliseconds
# GRADE: Failed on test: 0