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Added srcReg and deallocated it for maskreg and c_add (vote and shfl)

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This commit is contained in:
Rishabh Ravi 2024-09-19 16:11:26 -04:00
parent 323cbf1247
commit 16c69ae7ee
2 changed files with 17 additions and 3 deletions
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13
sim/simx/decode.cpp
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@ -53,6 +53,7 @@ static const std::unordered_map<Opcode, InstType> sc_instTable = {
{Opcode::I_W, InstType::I},
{Opcode::VOTE, InstType::I},
{Opcode::SHFL, InstType::I},
{Opcode::TILE, InstType::I},
};
enum Constants {
@ -408,6 +409,7 @@ static const char* op_string(const Instr &instr) {
}
case Opcode::VOTE: return "VOTE";
case Opcode::SHFL: return "SHFL";
case Opcode::TILE: return "TILE";
default:
std::abort();
}
@ -602,6 +604,8 @@ std::shared_ptr<Instr> Emulator::decode(uint32_t code) const {
instr->setDestReg(rd, RegType::Integer);
instr->addSrcReg(rs1, RegType::Integer);
auto imm = code >> shift_rs2;
uint32_t address = imm & 0xfff;
instr->addSrcReg(address, RegType::Integer);
instr->setImm(sext(imm, width_i_imm));
break;
}
@ -609,6 +613,15 @@ std::shared_ptr<Instr> Emulator::decode(uint32_t code) const {
instr->setFunc3(func3);
instr->setDestReg(rd, RegType::Integer);
instr->addSrcReg(rs1, RegType::Integer);
auto imm = code >> shift_rs2;
uint32_t address = imm & 0x01f;
instr->addSrcReg(address, RegType::Integer);
uint32_t c_add = ((imm & 0xc00) >> 10) + address;
instr->addSrcReg(c_add, RegType::Integer);
instr->setImm(sext(imm, width_i_imm));
break;
}
case Opcode::TILE:{
auto imm = code >> shift_rs2;
instr->setImm(sext(imm, width_i_imm));
break;

7
sim/simx/execute.cpp
View file

@ -1445,10 +1445,10 @@ void Emulator::execute(const Instr &instr, uint32_t wid, instr_trace_t *trace) {
func3 = func3%4;
trace->fu_type = FUType::ALU;
trace->alu_type = AluType::ARITH;
trace->used_iregs.set(rsrc0);
trace->fetch_stall = true;
uint32_t address = immsrc & 0xfff;
auto mask = warp.ireg_file.at(0)[address]; // Same mask stored in all threads
trace->used_iregs.set(rsrc0);
trace->used_iregs.set(address);
switch (func3) {
case 0:{ //all
check = true;
@ -1545,7 +1545,6 @@ void Emulator::execute(const Instr &instr, uint32_t wid, instr_trace_t *trace) {
case Opcode::SHFL:{
trace->fu_type = FUType::ALU;
trace->alu_type = AluType::ARITH;
trace->fetch_stall = true;
uint32_t address = immsrc & 0x01f;
auto mask = warp.ireg_file.at(0)[address]; // Same mask stored in all threads
uint32_t b = (immsrc & 0x3e0) >> 5;
@ -1595,6 +1594,8 @@ void Emulator::execute(const Instr &instr, uint32_t wid, instr_trace_t *trace) {
}
}
trace->used_iregs.set(rsrc0);
trace->used_iregs.set(address);
trace->used_iregs.set(c_add);
}break;
default: