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Edited FPGA guide and created Simualtion guide
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@ -16,7 +16,7 @@ OPAE Environment Setup
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OPAE Build Configuration
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------------------------
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Within the /hw/syn/opae directory, there are source text files for each core-option for the fpga build (the 32 and 64 core options are not currently implemented) which have the following parameters that can be configured:
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Within the `/hw/syn/opae` directory, there are source text files for each core-option for the fpga build (the 32 and 64 core options are not currently implemented) which have the following parameters that can be configured:
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- NUM_CORES: the number of cores per cluster
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- NUM_CLUSTERS: the number of clusters alotted to the processor
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- L3_ENABLE: enable the use of the L3 cache
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@ -35,35 +35,33 @@ The Flubber FPGA has to following configuration options:
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- 16 cores fpga (fpga-16c)
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$ cd hw/syn/opae
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$ make fpga-*# of cores*c
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$ make fpga- *# of cores* c
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Example: `make fpga-4c`
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A new folder `build_fpga_*# of cores*c` will be created and the build will start and take ~30-45 min to complete.
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A new folder (ex: `build_fpga_4c`) will be created and the build will start and take ~30-45 min to complete.
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OPAE Build Progress
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-------------------
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You could check the last 10 lines in the build log for possible errors until build completion.
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$ tail -n 10 ./build_fpga_*# of cores*c/build.log
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Example: `tail -n 10 ./build_fpga_4c/build.log`
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$ tail -n 10 ./build_fpga_4c/build.log
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Check if the build is still running by looking for quartus_sh, quartus_syn, or quartus_fit programs.
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$ ps -u `username`
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$ ps -u *username*
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If the build fails and you need to restart it, clean up the build folder using the following command:
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$ make clean-fpga-*# of cores*c
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$ make clean-fpga- *# of cores* c
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Example: `make clean-fpga-4c`
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The file `vortex_afu.gbs` should exist when the build is done:
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$ ls -lsa ./build_fpga_*# of cores*c/vortex_afu.gbs
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$ ls -lsa ./build_fpga_ *# of cores* c/vortex_afu.gbs
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Signing the bitstream and Programming the FPGA
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36
doc/Simulation.md
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36
doc/Simulation.md
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# Vortex Simulation Methods
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### RTL Simulation
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[Verilator] (https://www.veripool.org/projects/verilator/wiki) is a Verilog/SystemVerilog design simulator that converts the Verilog HDL to single- or mult-ithreaded C++/SystemC code to perform the design simulation. An installation guide for Verilator is located [here.] (https://www.veripool.org/projects/verilator/wiki/Installing)
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### Cycle-Approximate Simulation
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SimX is a C++ cycle-level in-house simulator developed for Vortex. The relevant files are located in the `simX` folder.
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### FGPA Simulation
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The current target FPGA for simulation is the Arria10 Intel Accelerator Card v1.0. The guide to build the fpga with specific configurations is located [here.] (https://github.com/vortexgpgpu/vortex-dev/blob/master/doc/Flubber_FPGA_Startup_Guide.md)
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### How to Test
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Running tests under specific drivers (rtlsim,simx,fpga) is done using the script named `blackbox.sh` located in the `ci` folder. Running command `./ci/blackbox.sh --help` from the Vortex root directory will display the following command line arguments for `blackbox.sh`:
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- *Clusters* - used to specify the number of clusters (collection of processing elements) within a configuration.
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- *Cores* - used to specify the number of cores (processing element containing multiple warps) within a configuration.
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- *Warps* - used to specify the number of warps (collection of concurrent hardware threads) within a configuration.
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- *Threads* - used to specify the number of threads (smallest unit of computation) within a configuration.
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- *L2cache* - used to enable the shard l2cache among the Vortex cores.
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- *L3cache* - used to enable the shared l3cache among the Vortex clusters.
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- *Driver* - used to specify which driver to run the Vortex simulation (either rtlsim, vlsim, fpga, or simx).
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- *Debug* - used to enable debug mode for the Vortex simulation.
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- *Perf* - is used to enable the detailed performance counters within the Vortex simulation.
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- *App* - is used to specify which test/benchmark to run in the Vortex simulation. The main choices are vecadd, sgemm, basic, demo, and dogfood. Other tests/benchmarks are located in the `/benchmarks/opencl` folder though not all of them work wit the current version of Vortex.
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- *Args* -
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An example of using the `blackbox.sh` commandline arguments is shown below.
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Run the sgemm benchmark using the vlsim driver with a Vortex configuration of 1 cluster, 4 cores, 4 warps, and 4 threads:
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$ ./ci/blackbox.sh --clusters=1 --cores=4 --warps=4 --threads=4 --driver=vlsim --app=sgemm
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