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minor updates

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This commit is contained in:
Blaise Tine 2024-07-21 11:37:34 -07:00
parent 0bc459d84e
commit 31e31ac528
2 changed files with 16 additions and 17 deletions
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2
hw/rtl/fpu/VX_fpu_fpnew.sv
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@ -105,7 +105,7 @@ module VX_fpu_fpnew
`UNUSED_VAR (fmt)
always @(*) begin
fpu_op = 'x;
fpu_op = fpnew_pkg::operation_e'('x);
fpu_rnd = frm;
fpu_op_mod = 0;
fpu_has_fflags = 1;

31
hw/unittest/cache/cachesim.h vendored
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@ -1,10 +1,10 @@
// Copyright © 2019-2023
//
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
@ -31,7 +31,6 @@
#define MEM_LATENCY 100
#define MEM_RQ_SIZE 16
#define MEM_STALLS_MODULO 16
#define MEM_BLOCK_SIZE 16
typedef struct {
int cycles_left;
@ -41,7 +40,7 @@ typedef struct {
typedef struct {
char valid;
char rw;
char rw;
unsigned byteen;
unsigned *addr;
unsigned *data;
@ -50,24 +49,24 @@ typedef struct {
class CacheSim {
public:
CacheSim();
virtual ~CacheSim();
bool busy();
bool busy();
void reset();
void step();
void wait(uint32_t cycles);
void wait(uint32_t cycles);
void attach_ram(RAM* ram);
void run(); //run until all reqs are empty
//req/rsp
void send_req(core_req_t *req);
void clear_req();
void clear_req();
void stall_mem();
void send_snoop_req();
void send_snp_fwd_in();
void send_snp_fwd_in();
//assert funcs
bool assert_equal(unsigned int* data, unsigned int tag);
@ -81,14 +80,14 @@ public:
void get_mem_rsp();
void display_miss();
private:
private:
void eval();
void eval_reqs();
void eval();
void eval_reqs();
void eval_rsps();
void eval_mem_bus();
std::queue<core_req_t*> core_req_vec_;
std::queue<core_req_t*> core_req_vec_;
std::vector<mem_req_t> mem_rsp_vec_;
std::map<unsigned int, unsigned int*> core_rsp_vec_;
int mem_rsp_active_;