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reset GRPs only in debug mode
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parent
160c428ef5
commit
382b686d59
3 changed files with 19 additions and 2 deletions
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@ -53,9 +53,9 @@ A waveform trace `trace.vcd` will be generated in the current directory during t
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## Analyzing Vortex trace log
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When debugging Vortex RTL or SimX Simulator, reading the trace run.log file can be overwhelming when the trace gets really large.
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We provide a trace sanitizer tool under ./hw/scripts/trace_csv.py that you can use to convert the large trace into a CSV file containing all the instructions that executed with their source and destination operands. To increase compatibility between traces you will need to initialize RTLSIM's GPRs to zero by defining GPR_RESET.
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We provide a trace sanitizer tool under ./hw/scripts/trace_csv.py that you can use to convert the large trace into a CSV file containing all the instructions that executed with their source and destination operands.
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$ CONFIGS="-DGPR_RESET" ./ci/blackbox.sh --driver=rtlsim --app=demo --debug=3 --log=run_rtlsim.log
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$ ./ci/blackbox.sh --driver=rtlsim --app=demo --debug=3 --log=run_rtlsim.log
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$ ./ci/trace_csv.py -trtlsim run_rtlsim.log -otrace_rtlsim.csv
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$ ./ci/blackbox.sh --driver=simx --app=demo --debug=3 --log=run_simx.log
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@ -13,6 +13,13 @@
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`include "VX_define.vh"
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// reset all GPRs in debug mode
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`ifdef SIMULATION
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`ifndef NDEBUG
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`define GPR_RESET
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`endif
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`endif
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module VX_operands import VX_gpu_pkg::*; #(
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parameter `STRING INSTANCE_ID = "",
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parameter NUM_BANKS = 4,
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@ -53,15 +53,25 @@ void Emulator::warp_t::clear(uint64_t startup_addr) {
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this->uuid = 0;
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this->fcsr = 0;
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std::srand(50);
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for (auto& reg_file : this->ireg_file) {
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for (auto& reg : reg_file) {
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#ifndef NDEBUG
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reg = 0;
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#else
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reg = std::rand();
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#endif
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}
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}
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for (auto& reg_file : this->freg_file) {
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for (auto& reg : reg_file) {
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#ifndef NDEBUG
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reg = 0;
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#else
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reg = std::rand();
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#endif
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}
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}
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}
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