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minor update

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This commit is contained in:
Blaise Tine 2024-03-21 09:36:38 -07:00
parent 35a782a7ba
commit 3cd7f41012
6 changed files with 19 additions and 15 deletions
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3
hw/rtl/core/VX_core.sv
View file

@ -318,7 +318,8 @@ module VX_core import VX_gpu_pkg::*; #(
.DATA_SIZE (DCACHE_WORD_SIZE),
.TAG_WIDTH (DCACHE_TAG_WIDTH),
.TAG_SEL_BITS (DCACHE_TAG_WIDTH - `UUID_WIDTH),
.REQ_OUT_BUF (3) // external bus should be registered
.REQ_OUT_BUF (0),
.RSP_OUT_BUF (0)
) lsu_adapter (
.clk (clk),
.reset (lsu_adapter_reset),

14
hw/rtl/core/VX_lmem_unit.sv
View file

@ -45,20 +45,19 @@ module VX_lmem_unit import VX_gpu_pkg::*; #(
wire [`NUM_LSU_LANES-1:0] is_addr_local_mask;
for (genvar j = 0; j < `NUM_LSU_LANES; ++j) begin
assign is_addr_local_mask[j] = lsu_mem_in_if[i].req_data.mask[j]
&& lsu_mem_in_if[i].req_data.atype[j][`ADDR_TYPE_LOCAL];
assign is_addr_local_mask[j] = lsu_mem_in_if[i].req_data.atype[j][`ADDR_TYPE_LOCAL];
end
wire is_addr_local = | is_addr_local_mask;
wire is_addr_global = | (~is_addr_local_mask);
wire is_addr_global = | (lsu_mem_in_if[i].req_data.mask & ~is_addr_local_mask);
wire is_addr_local = | (lsu_mem_in_if[i].req_data.mask & is_addr_local_mask);
wire req_global_ready;
wire req_local_ready;
VX_elastic_buffer #(
.DATAW (REQ_DATAW),
.SIZE (0),
.OUT_REG (0)
.SIZE (2),
.OUT_REG (1)
) req_global_buf (
.clk (clk),
.reset (req_reset),
@ -191,7 +190,8 @@ module VX_lmem_unit import VX_gpu_pkg::*; #(
.DATA_SIZE (LSU_WORD_SIZE),
.TAG_WIDTH (LSU_TAG_WIDTH),
.TAG_SEL_BITS (LSU_TAG_WIDTH - `UUID_WIDTH),
.REQ_OUT_BUF (2)
.REQ_OUT_BUF (2),
.RSP_OUT_BUF (1)
) lsu_adapter (
.clk (clk),
.reset (adapter_reset),

3
hw/rtl/core/VX_lsu_slice.sv
View file

@ -297,7 +297,8 @@ module VX_lsu_slice import VX_gpu_pkg::*; #(
.MEM_QUEUE_SIZE (`LSUQ_OUT_SIZE),
.UUID_WIDTH (`UUID_WIDTH),
.RSP_PARTIAL (1),
.MEM_OUT_BUF (2)
.MEM_OUT_BUF (0),
.CORE_OUT_BUF(0)
) mem_scheduler (
.clk (clk),
.reset (mem_scheduler_reset),

2
hw/rtl/core/VX_operands.sv
View file

@ -25,7 +25,9 @@ module VX_operands import VX_gpu_pkg::*; #(
);
for (genvar i = 0; i < `ISSUE_WIDTH; ++i) begin
`RESET_RELAY (slice_reset, reset);
VX_gpr_slice #(
.CORE_ID (CORE_ID)
) gpr_slice (

6
hw/syn/altera/opae/Makefile
View file

@ -45,9 +45,9 @@ CONFIGS_1c := -DNUM_CLUSTERS=1 -DNUM_CORES=1
CONFIGS_2c := -DNUM_CLUSTERS=1 -DNUM_CORES=2
CONFIGS_4c := -DNUM_CLUSTERS=1 -DNUM_CORES=4
CONFIGS_8c := -DNUM_CLUSTERS=1 -DNUM_CORES=8
CONFIGS_16c := -DNUM_CLUSTERS=1 -DNUM_CORES=16 -DL2_ENABLE
CONFIGS_32c := -DNUM_CLUSTERS=2 -DNUM_CORES=16 -DL2_ENABLE
CONFIGS_64c := -DNUM_CLUSTERS=4 -DNUM_CORES=16 -DL2_ENABLE
CONFIGS_16c := -DNUM_CLUSTERS=1 -DNUM_CORES=16
CONFIGS_32c := -DNUM_CLUSTERS=2 -DNUM_CORES=16
CONFIGS_64c := -DNUM_CLUSTERS=4 -DNUM_CORES=16
CONFIGS += $(CONFIGS_$(NUM_CORES)c)
# include paths

6
hw/syn/xilinx/xrt/Makefile
View file

@ -62,9 +62,9 @@ CONFIGS_1c := -DNUM_CLUSTERS=1 -DNUM_CORES=1
CONFIGS_2c := -DNUM_CLUSTERS=1 -DNUM_CORES=2
CONFIGS_4c := -DNUM_CLUSTERS=1 -DNUM_CORES=4
CONFIGS_8c := -DNUM_CLUSTERS=1 -DNUM_CORES=8
CONFIGS_16c := -DNUM_CLUSTERS=1 -DNUM_CORES=16 -DL2_ENABLE
CONFIGS_32c := -DNUM_CLUSTERS=2 -DNUM_CORES=16 -DL2_ENABLE
CONFIGS_64c := -DNUM_CLUSTERS=4 -DNUM_CORES=16 -DL2_ENABLE
CONFIGS_16c := -DNUM_CLUSTERS=1 -DNUM_CORES=16
CONFIGS_32c := -DNUM_CLUSTERS=2 -DNUM_CORES=16
CONFIGS_64c := -DNUM_CLUSTERS=4 -DNUM_CORES=16
CONFIGS += $(CONFIGS_$(NUM_CORES)c)
# include paths