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minor update

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This commit is contained in:
Blaise Tine 2023-07-05 19:01:31 -04:00
parent e580d64dc3
commit 3e645cee32
5 changed files with 26 additions and 25 deletions
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2
docs/testing.md
View file

@ -7,7 +7,7 @@ You can query the commandline options of the tool using:
$ ./ci/blakcbox.sh --help
To execute a simple sgemm test program on the simx driver and passing "-n10" as argument to sgemm:
To execute sgemm test program on the simx driver and passing "-n10" as argument to sgemm:
$ ./ci/blakcbox.sh --driver=simx --app=sgemm --args="-n10"

3
hw/rtl/core/VX_schedule.sv
View file

@ -43,7 +43,6 @@ module VX_schedule #(
// barriers
reg [`NUM_BARRIERS-1:0][`NUM_WARPS-1:0] barrier_masks;
wire [$clog2(`NUM_WARPS+1)-1:0] active_barrier_count;
wire [`NUM_WARPS-1:0] curr_barrier_mask;
reg [`NUM_WARPS-1:0] curr_barrier_mask_n;
reg gbar_req_valid;
reg [`NB_BITS-1:0] gbar_req_id;
@ -203,7 +202,7 @@ module VX_schedule #(
// barrier handling
assign curr_barrier_mask = barrier_masks[warp_ctl_if.barrier.id];
wire [`NUM_WARPS-1:0] curr_barrier_mask = barrier_masks[warp_ctl_if.barrier.id];
`POP_COUNT(active_barrier_count, curr_barrier_mask);
`UNUSED_VAR (active_barrier_count)

2
hw/rtl/libs/VX_elastic_buffer.sv
View file

@ -18,8 +18,6 @@ module VX_elastic_buffer #(
input wire ready_out,
output wire valid_out
);
`STATIC_ASSERT (SIZE != 1, ("invalid parameter"))
if (SIZE == 0) begin
`UNUSED_VAR (clk)

24
hw/rtl/libs/VX_stream_arb.sv
View file

@ -22,6 +22,8 @@ module VX_stream_arb #(
output wire [NUM_OUTPUTS-1:0][NUM_LANES-1:0][DATAW-1:0] data_out,
input wire [NUM_OUTPUTS-1:0][NUM_LANES-1:0] ready_out
);
localparam BUF_SIZE = (BUFFERED == 3) ? 1 : ((BUFFERED != 0) ? 2 : 0);
if (NUM_INPUTS > NUM_OUTPUTS) begin
if (NUM_OUTPUTS > 1) begin
@ -135,7 +137,7 @@ module VX_stream_arb #(
VX_generic_arbiter #(
.NUM_REQS (NUM_REQS),
.LOCK_ENABLE (1),
.LOCK_ENABLE (LOCK_ENABLE),
.TYPE (ARBITER)
) arbiter (
.clk (clk),
@ -163,11 +165,11 @@ module VX_stream_arb #(
`RESET_RELAY_EX (out_buf_reset, reset, 1, (NUM_LANES > MAX_FANOUT) ? 0 : -1);
for (genvar i = 0; i < NUM_LANES; ++i) begin
VX_skid_buffer #(
for (genvar i = 0; i < NUM_LANES; ++i) begin
VX_elastic_buffer #(
.DATAW (DATAW),
.PASSTHRU (BUFFERED == 0),
.OUT_REG (BUFFERED > 1)
.SIZE (BUF_SIZE),
.OUT_REG (BUFFERED != 1)
) out_buf (
.clk (clk),
.reset (out_buf_reset),
@ -317,10 +319,10 @@ module VX_stream_arb #(
for (genvar i = 0; i < NUM_REQS; ++i) begin
for (genvar j = 0; j < NUM_LANES; ++j) begin
VX_skid_buffer #(
VX_elastic_buffer #(
.DATAW (DATAW),
.PASSTHRU (BUFFERED == 0),
.OUT_REG (BUFFERED > 1)
.SIZE (BUF_SIZE),
.OUT_REG (BUFFERED != 1)
) out_buf (
.clk (clk),
.reset (out_buf_reset),
@ -341,10 +343,10 @@ module VX_stream_arb #(
for (genvar i = 0; i < NUM_OUTPUTS; ++i) begin
for (genvar j = 0; j < NUM_LANES; ++j) begin
VX_skid_buffer #(
VX_elastic_buffer #(
.DATAW (DATAW),
.PASSTHRU (BUFFERED == 0),
.OUT_REG (BUFFERED > 1)
.SIZE (BUF_SIZE),
.OUT_REG (BUFFERED != 1)
) out_buf (
.clk (clk),
.reset (out_buf_reset),

20
hw/rtl/libs/VX_stream_switch.sv
View file

@ -25,6 +25,8 @@ module VX_stream_switch #(
output wire [NUM_OUTPUTS-1:0][NUM_LANES-1:0][DATAW-1:0] data_out,
input wire [NUM_OUTPUTS-1:0][NUM_LANES-1:0] ready_out
);
localparam BUF_SIZE = (BUFFERED == 3) ? 1 : ((BUFFERED != 0) ? 2 : 0);
if (NUM_INPUTS > NUM_OUTPUTS) begin
wire [NUM_OUTPUTS-1:0][NUM_REQS-1:0][NUM_LANES-1:0] valid_in_r;
@ -66,10 +68,10 @@ module VX_stream_switch #(
for (genvar i = 0; i < NUM_OUTPUTS; ++i) begin
for (genvar j = 0; j < NUM_LANES; ++j) begin
localparam ii = i * NUM_LANES + j;
VX_skid_buffer #(
VX_elastic_buffer #(
.DATAW (DATAW),
.PASSTHRU (BUFFERED == 0),
.OUT_REG (BUFFERED > 1)
.SIZE (BUF_SIZE),
.OUT_REG (BUFFERED != 1)
) out_buf (
.clk (clk),
.reset (out_buf_reset),
@ -102,10 +104,10 @@ module VX_stream_switch #(
localparam ii = i * NUM_REQS + j;
if (ii < NUM_OUTPUTS) begin
for (genvar k = 0; k < NUM_LANES; ++k) begin
VX_skid_buffer #(
VX_elastic_buffer #(
.DATAW (DATAW),
.PASSTHRU (BUFFERED == 0),
.OUT_REG (BUFFERED > 1)
.SIZE (BUF_SIZE),
.OUT_REG (BUFFERED != 1)
) out_buf (
.clk (clk),
.reset (out_buf_reset),
@ -132,10 +134,10 @@ module VX_stream_switch #(
for (genvar i = 0; i < NUM_OUTPUTS; ++i) begin
for (genvar j = 0; j < NUM_LANES; ++j) begin
VX_skid_buffer #(
VX_elastic_buffer #(
.DATAW (DATAW),
.PASSTHRU (BUFFERED == 0),
.OUT_REG (BUFFERED > 1)
.SIZE (BUF_SIZE),
.OUT_REG (BUFFERED != 1)
) out_buf (
.clk (clk),
.reset (out_buf_reset),