mirror of
https://github.com/vortexgpgpu/vortex.git
synced 2025-04-23 21:39:10 -04:00
minor updates
This commit is contained in:
Blaise Tine
parent
0048496ba2
commit
40a7d60d76
7 changed files with 112 additions and 116 deletions
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@ -430,6 +430,23 @@
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assign src.rsp_tag = dst.rsp_tag; \
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assign dst.rsp_ready = src.rsp_ready
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`define ASSIGN_VX_GPU_EXE_IF_V(dst, src, src_valid) \
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assign dst.valid = src_valid; \
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assign dst.uuid = src.uuid; \
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assign dst.wid = src.wid; \
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assign dst.tmask = src.tmask; \
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assign dst.PC = src.PC; \
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assign dst.next_PC = src.next_PC; \
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assign dst.op_type = src.op_type; \
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assign dst.op_mod = src.op_mod; \
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assign dst.tid = src.tid; \
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assign dst.rs1_data = src.rs1_data; \
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assign dst.rs2_data = src.rs2_data; \
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assign dst.rs3_data = src.rs3_data; \
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assign dst.rd = src.rd; \
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assign dst.wb = src.wb; \
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assign src.ready = dst.ready
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`define REDUCE_ADD(dst, src, field, width, count) \
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wire [count-1:0][width-1:0] __reduce_add_i_``src``field; \
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wire [width-1:0] __reduce_add_o_``dst``field; \
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@ -88,7 +88,6 @@ module VX_socket #(
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VX_raster_arb #(
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.NUM_INPUTS (1),
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.NUM_LANES (`NUM_THREADS),
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.NUM_INPUTS (1),
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.NUM_OUTPUTS (`SOCKET_SIZE),
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.ARBITER ("R"),
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.BUFFERED ((`SOCKET_SIZE > 1) ? 2 : 0)
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@ -1,9 +1,4 @@
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`include "VX_define.vh"
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`include "VX_gpu_types.vh"
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`IGNORE_WARNINGS_BEGIN
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import VX_gpu_types::*;
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`IGNORE_WARNINGS_END
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module VX_gpu_unit #(
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parameter CORE_ID = 0
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@ -67,26 +62,11 @@ module VX_gpu_unit #(
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wire csr_ready = ~csr_pending;
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assign gpu_req_valid = gpu_exe_if.valid && csr_ready;
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`UNUSED_VAR (gpu_exe_if.op_mod)
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`UNUSED_VAR (gpu_exe_if.rs3_data)
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// Warp control block
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VX_gpu_exe_if wctl_exe_if();
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VX_commit_if wctl_commit_if();
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assign wctl_exe_if.valid = gpu_req_valid && `INST_GPU_IS_WCTL(gpu_exe_if.op_type);
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assign wctl_exe_if.op_type = gpu_exe_if.op_type;
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assign wctl_exe_if.uuid = gpu_exe_if.uuid;
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assign wctl_exe_if.wid = gpu_exe_if.wid;
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assign wctl_exe_if.tmask = gpu_exe_if.tmask;
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assign wctl_exe_if.tid = gpu_exe_if.tid;
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assign wctl_exe_if.PC = gpu_exe_if.PC;
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assign wctl_exe_if.next_PC = gpu_exe_if.next_PC;
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assign wctl_exe_if.rd = gpu_exe_if.rd;
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assign wctl_exe_if.wb = gpu_exe_if.wb;
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assign wctl_exe_if.rs1_data = gpu_exe_if.rs1_data;
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assign wctl_exe_if.rs2_data = gpu_exe_if.rs2_data;
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`ASSIGN_VX_GPU_EXE_IF_V(wctl_exe_if, gpu_exe_if, gpu_req_valid && `INST_GPU_IS_WCTL(gpu_exe_if.op_type));
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VX_wctl_unit #(
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.OUTPUT_REG (RSP_ARB_SIZE > 1)
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@ -104,22 +84,10 @@ module VX_gpu_unit #(
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`ifdef EXT_TEX_ENABLE
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VX_tex_exe_if tex_exe_if();
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VX_commit_if tex_commit_if();
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VX_gpu_exe_if tex_exe_if();
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VX_commit_if tex_commit_if();
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assign tex_exe_if.valid = gpu_req_valid && (gpu_exe_if.op_type == `INST_GPU_TEX);
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assign tex_exe_if.uuid = gpu_exe_if.uuid;
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assign tex_exe_if.wid = gpu_exe_if.wid;
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assign tex_exe_if.tmask = gpu_exe_if.tmask;
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assign tex_exe_if.PC = gpu_exe_if.PC;
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assign tex_exe_if.rd = gpu_exe_if.rd;
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assign tex_exe_if.stage = gpu_exe_if.op_mod[`VX_TEX_STAGE_BITS-1:0];
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for (genvar i = 0; i < `NUM_THREADS; ++i) begin
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assign tex_exe_if.coords[0][i] = gpu_exe_if.rs1_data[i][31:0];
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assign tex_exe_if.coords[1][i] = gpu_exe_if.rs2_data[i][31:0];
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assign tex_exe_if.lod[i] = gpu_exe_if.rs3_data[i][0 +: `VX_TEX_LOD_BITS];
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end
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`ASSIGN_VX_GPU_EXE_IF_V(tex_exe_if, gpu_exe_if, gpu_req_valid && (gpu_exe_if.op_type == `INST_GPU_TEX));
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`RESET_RELAY (tex_reset, reset);
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@ -128,8 +96,8 @@ module VX_gpu_unit #(
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) tex_agent (
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.clk (clk),
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.reset (tex_reset),
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.gpu_exe_if (tex_exe_if),
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.tex_csr_if (tex_csr_if),
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.tex_exe_if (tex_exe_if),
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.tex_bus_if (tex_bus_if),
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.commit_if (tex_commit_if)
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);
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@ -142,15 +110,10 @@ module VX_gpu_unit #(
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`ifdef EXT_RASTER_ENABLE
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VX_raster_exe_if raster_exe_if();
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VX_commit_if raster_commit_if();
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VX_gpu_exe_if raster_exe_if();
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VX_commit_if raster_commit_if();
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assign raster_exe_if.valid = gpu_req_valid && (gpu_exe_if.op_type == `INST_GPU_RASTER);
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assign raster_exe_if.uuid = gpu_exe_if.uuid;
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assign raster_exe_if.wid = gpu_exe_if.wid;
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assign raster_exe_if.tmask = gpu_exe_if.tmask;
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assign raster_exe_if.PC = gpu_exe_if.PC;
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assign raster_exe_if.rd = gpu_exe_if.rd;
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`ASSIGN_VX_GPU_EXE_IF_V(raster_exe_if, gpu_exe_if, gpu_req_valid && (gpu_exe_if.op_type == `INST_GPU_RASTER));
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`RESET_RELAY (raster_reset, reset);
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@ -159,9 +122,9 @@ module VX_gpu_unit #(
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) raster_agent (
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.clk (clk),
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.reset (raster_reset),
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.gpu_exe_if (raster_exe_if),
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.raster_csr_if (raster_csr_if),
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.raster_bus_if (raster_bus_if),
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.raster_exe_if (raster_exe_if),
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.raster_bus_if (raster_bus_if),
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.commit_if (raster_commit_if)
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);
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@ -173,22 +136,10 @@ module VX_gpu_unit #(
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`ifdef EXT_ROP_ENABLE
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VX_rop_exe_if rop_exe_if();
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VX_commit_if rop_commit_if();
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VX_gpu_exe_if rop_exe_if();
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VX_commit_if rop_commit_if();
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assign rop_exe_if.valid = gpu_req_valid && (gpu_exe_if.op_type == `INST_GPU_ROP);
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assign rop_exe_if.uuid = gpu_exe_if.uuid;
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assign rop_exe_if.wid = gpu_exe_if.wid;
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assign rop_exe_if.tmask = gpu_exe_if.tmask;
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assign rop_exe_if.PC = gpu_exe_if.PC;
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for (genvar i = 0; i < `NUM_THREADS; ++i) begin
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assign rop_exe_if.face[i] = gpu_exe_if.rs1_data[i][0];
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assign rop_exe_if.pos_x[i] = gpu_exe_if.rs1_data[i][1 +: `VX_ROP_DIM_BITS];
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assign rop_exe_if.pos_y[i] = gpu_exe_if.rs1_data[i][16 +: `VX_ROP_DIM_BITS];
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assign rop_exe_if.color[i] = gpu_exe_if.rs2_data[i][31:0];
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assign rop_exe_if.depth[i] = gpu_exe_if.rs3_data[i][`VX_ROP_DEPTH_BITS-1:0];
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end
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`ASSIGN_VX_GPU_EXE_IF_V(rop_exe_if, gpu_exe_if, gpu_req_valid && (gpu_exe_if.op_type == `INST_GPU_ROP));
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`RESET_RELAY (rop_reset, reset);
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@ -197,8 +148,8 @@ module VX_gpu_unit #(
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) rop_agent (
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.clk (clk),
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.reset (rop_reset),
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.gpu_exe_if (rop_exe_if),
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.rop_csr_if (rop_csr_if),
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.rop_exe_if (rop_exe_if),
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.rop_bus_if (rop_bus_if),
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.commit_if (rop_commit_if)
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);
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@ -272,7 +223,7 @@ module VX_gpu_unit #(
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`endif
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// can accept new request?
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always @(*) begin
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case (gpu_exe_if.op_type)
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`ifdef EXT_TEX_ENABLE
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@ -1,4 +1,9 @@
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`include "VX_define.vh"
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`include "VX_gpu_types.vh"
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`IGNORE_WARNINGS_BEGIN
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import VX_gpu_types::*;
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`IGNORE_WARNINGS_END
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module VX_wctl_unit #(
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parameter OUTPUT_REG = 0
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@ -7,11 +7,11 @@ module VX_raster_agent #(
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input wire reset,
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// Inputs
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VX_raster_exe_if.slave raster_exe_if,
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VX_raster_bus_if.slave raster_bus_if,
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// Outputs
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VX_gpu_exe_if.slave gpu_exe_if,
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VX_gpu_csr_if.slave raster_csr_if,
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VX_raster_bus_if.slave raster_bus_if,
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// Outputs
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VX_commit_if.master commit_if
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);
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`UNUSED_PARAM (CORE_ID)
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@ -23,7 +23,7 @@ module VX_raster_agent #(
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// CSRs access
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wire csr_write_enable = raster_bus_if.req_valid && raster_exe_if.valid && raster_rsp_ready;
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wire csr_write_enable = raster_bus_if.req_valid && gpu_exe_if.valid && raster_rsp_ready;
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VX_raster_csr #(
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.CORE_ID (CORE_ID)
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@ -32,22 +32,22 @@ module VX_raster_agent #(
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.reset (reset),
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// inputs
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.write_enable (csr_write_enable),
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.write_uuid (raster_exe_if.uuid),
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.write_wid (raster_exe_if.wid),
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.write_tmask (raster_exe_if.tmask),
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.write_uuid (gpu_exe_if.uuid),
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.write_wid (gpu_exe_if.wid),
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.write_tmask (gpu_exe_if.tmask),
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.write_data (raster_bus_if.req_stamps),
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// outputs
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.raster_csr_if (raster_csr_if)
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);
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// it is possible to have ready = f(valid) when using arbiters,
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// because of that we need to decouple raster_exe_if and commit_if handshake with a pipe register
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// because of that we need to decouple gpu_exe_if and commit_if handshake with a pipe register
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assign raster_exe_if.ready = raster_bus_if.req_valid && raster_rsp_ready;
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assign gpu_exe_if.ready = raster_bus_if.req_valid && raster_rsp_ready;
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assign raster_bus_if.req_ready = raster_exe_if.valid && raster_rsp_ready;
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assign raster_bus_if.req_ready = gpu_exe_if.valid && raster_rsp_ready;
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assign raster_rsp_valid = raster_exe_if.valid && raster_bus_if.req_valid;
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assign raster_rsp_valid = gpu_exe_if.valid && raster_bus_if.req_valid;
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wire [`NUM_THREADS-1:0][31:0] response_data, commit_data;
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@ -62,7 +62,7 @@ module VX_raster_agent #(
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.reset (reset),
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.valid_in (raster_rsp_valid),
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.ready_in (raster_rsp_ready),
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.data_in ({raster_exe_if.uuid, raster_exe_if.wid, raster_exe_if.tmask, raster_exe_if.PC, raster_exe_if.rd, response_data}),
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.data_in ({gpu_exe_if.uuid, gpu_exe_if.wid, gpu_exe_if.tmask, gpu_exe_if.PC, gpu_exe_if.rd, response_data}),
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.data_out ({commit_if.uuid, commit_if.wid, commit_if.tmask, commit_if.PC, commit_if.rd, commit_data}),
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.valid_out (commit_if.valid),
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.ready_out (commit_if.ready)
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@ -77,16 +77,16 @@ module VX_raster_agent #(
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`ifdef DBG_TRACE_RASTER
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always @(posedge clk) begin
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if (raster_exe_if.valid && raster_exe_if.ready) begin
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if (gpu_exe_if.valid && gpu_exe_if.ready) begin
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for (integer i = 0; i < `NUM_THREADS; ++i) begin
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`TRACE(1, ("%d: core%0d-raster-stamp[%0d]: wid=%0d, PC=0x%0h, tmask=%b, done=%b, x=%0d, y=%0d, mask=%0d, pid=%0d, bcoords={{0x%0h, 0x%0h, 0x%0h}, {0x%0h, 0x%0h, 0x%0h}, {0x%0h, 0x%0h, 0x%0h}, {0x%0h, 0x%0h, 0x%0h}} (#%0d)\n",
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$time, CORE_ID, i, raster_exe_if.wid, raster_exe_if.PC, raster_exe_if.tmask,
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$time, CORE_ID, i, gpu_exe_if.wid, gpu_exe_if.PC, gpu_exe_if.tmask,
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raster_bus_if.req_done,
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raster_bus_if.req_stamps[i].pos_x, raster_bus_if.req_stamps[i].pos_y, raster_bus_if.req_stamps[i].mask, raster_bus_if.req_stamps[i].pid,
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raster_bus_if.req_stamps[i].bcoords[0][0], raster_bus_if.req_stamps[i].bcoords[1][0], raster_bus_if.req_stamps[i].bcoords[2][0],
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raster_bus_if.req_stamps[i].bcoords[0][1], raster_bus_if.req_stamps[i].bcoords[1][1], raster_bus_if.req_stamps[i].bcoords[2][1],
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raster_bus_if.req_stamps[i].bcoords[0][2], raster_bus_if.req_stamps[i].bcoords[1][2], raster_bus_if.req_stamps[i].bcoords[2][2],
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raster_bus_if.req_stamps[i].bcoords[0][3], raster_bus_if.req_stamps[i].bcoords[1][3], raster_bus_if.req_stamps[i].bcoords[2][3], raster_exe_if.uuid));
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raster_bus_if.req_stamps[i].bcoords[0][3], raster_bus_if.req_stamps[i].bcoords[1][3], raster_bus_if.req_stamps[i].bcoords[2][3], gpu_exe_if.uuid));
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end
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end
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end
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@ -7,18 +7,32 @@ module VX_rop_agent #(
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input wire reset,
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// Inputs
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VX_rop_exe_if.slave rop_exe_if,
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VX_gpu_csr_if.slave rop_csr_if,
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VX_gpu_exe_if.slave gpu_exe_if,
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VX_gpu_csr_if.slave rop_csr_if,
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// Outputs
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VX_rop_bus_if.master rop_bus_if,
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VX_commit_if.master commit_if
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VX_rop_bus_if.master rop_bus_if,
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VX_commit_if.master commit_if
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);
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`UNUSED_PARAM (CORE_ID)
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localparam UUID_WIDTH = `UP(`UUID_BITS);
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localparam NW_WIDTH = `UP(`NW_BITS);
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wire [`NUM_THREADS-1:0][`VX_ROP_DIM_BITS-1:0] gpu_exe_pos_x;
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wire [`NUM_THREADS-1:0][`VX_ROP_DIM_BITS-1:0] gpu_exe_pos_y;
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wire [`NUM_THREADS-1:0] gpu_exe_face;
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wire [`NUM_THREADS-1:0][31:0] gpu_exe_color;
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wire [`NUM_THREADS-1:0][`VX_ROP_DEPTH_BITS-1:0] gpu_exe_depth;
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for (genvar i = 0; i < `NUM_THREADS; ++i) begin
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assign gpu_exe_face[i] = gpu_exe_if.rs1_data[i][0];
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assign gpu_exe_pos_x[i] = gpu_exe_if.rs1_data[i][1 +: `VX_ROP_DIM_BITS];
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assign gpu_exe_pos_y[i] = gpu_exe_if.rs1_data[i][16 +: `VX_ROP_DIM_BITS];
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assign gpu_exe_color[i] = gpu_exe_if.rs2_data[i][31:0];
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assign gpu_exe_depth[i] = gpu_exe_if.rs3_data[i][`VX_ROP_DEPTH_BITS-1:0];
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end
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// CSRs access
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rop_csrs_t rop_csrs;
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@ -42,7 +56,7 @@ module VX_rop_agent #(
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wire rop_rsp_valid, rop_rsp_ready;
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// it is possible to have ready = f(valid) when using arbiters,
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// because of that we need to decouple rop_exe_if and commit_if handshake with a pipe register
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// because of that we need to decouple gpu_exe_if and commit_if handshake with a pipe register
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VX_skid_buffer #(
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.DATAW (UUID_WIDTH + `NUM_THREADS * (1 + 2 * `VX_ROP_DIM_BITS + 32 + `VX_ROP_DEPTH_BITS + 1)),
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@ -52,15 +66,15 @@ module VX_rop_agent #(
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.reset (reset),
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.valid_in (rop_req_valid),
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.ready_in (rop_req_ready),
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||||
.data_in ({rop_exe_if.uuid, rop_exe_if.tmask, rop_exe_if.pos_x, rop_exe_if.pos_y, rop_exe_if.color, rop_exe_if.depth, rop_exe_if.face}),
|
||||
.data_in ({gpu_exe_if.uuid, gpu_exe_if.tmask, gpu_exe_pos_x, gpu_exe_pos_y, gpu_exe_color, gpu_exe_depth, gpu_exe_face}),
|
||||
.data_out ({rop_bus_if.req_uuid, rop_bus_if.req_mask, rop_bus_if.req_pos_x, rop_bus_if.req_pos_y, rop_bus_if.req_color, rop_bus_if.req_depth, rop_bus_if.req_face}),
|
||||
.valid_out (rop_bus_if.req_valid),
|
||||
.ready_out (rop_bus_if.req_ready)
|
||||
);
|
||||
|
||||
assign rop_req_valid = rop_exe_if.valid && rop_rsp_ready;
|
||||
assign rop_exe_if.ready = rop_req_ready && rop_rsp_ready;
|
||||
assign rop_rsp_valid = rop_exe_if.valid && rop_req_ready;
|
||||
assign rop_req_valid = gpu_exe_if.valid && rop_rsp_ready;
|
||||
assign gpu_exe_if.ready = rop_req_ready && rop_rsp_ready;
|
||||
assign rop_rsp_valid = gpu_exe_if.valid && rop_req_ready;
|
||||
|
||||
VX_skid_buffer #(
|
||||
.DATAW (UUID_WIDTH + NW_WIDTH + `NUM_THREADS + `XLEN)
|
||||
|
|
@ -69,7 +83,7 @@ module VX_rop_agent #(
|
|||
.reset (reset),
|
||||
.valid_in (rop_rsp_valid),
|
||||
.ready_in (rop_rsp_ready),
|
||||
.data_in ({rop_exe_if.uuid, rop_exe_if.wid, rop_exe_if.tmask, rop_exe_if.PC}),
|
||||
.data_in ({gpu_exe_if.uuid, gpu_exe_if.wid, gpu_exe_if.tmask, gpu_exe_if.PC}),
|
||||
.data_out ({commit_if.uuid, commit_if.wid, commit_if.tmask, commit_if.PC}),
|
||||
.valid_out (commit_if.valid),
|
||||
.ready_out (commit_if.ready)
|
||||
|
|
@ -82,18 +96,18 @@ module VX_rop_agent #(
|
|||
|
||||
`ifdef DBG_TRACE_ROP
|
||||
always @(posedge clk) begin
|
||||
if (rop_exe_if.valid && rop_exe_if.ready) begin
|
||||
`TRACE(1, ("%d: core%0d-rop-req: wid=%0d, PC=0x%0h, tmask=%b, x=", $time, CORE_ID, rop_exe_if.wid, rop_exe_if.PC, rop_exe_if.tmask));
|
||||
`TRACE_ARRAY1D(1, rop_exe_if.pos_x, `NUM_THREADS);
|
||||
if (gpu_exe_if.valid && gpu_exe_if.ready) begin
|
||||
`TRACE(1, ("%d: core%0d-rop-req: wid=%0d, PC=0x%0h, tmask=%b, x=", $time, CORE_ID, gpu_exe_if.wid, gpu_exe_if.PC, gpu_exe_if.tmask));
|
||||
`TRACE_ARRAY1D(1, gpu_exe_if.pos_x, `NUM_THREADS);
|
||||
`TRACE(1, (", y="));
|
||||
`TRACE_ARRAY1D(1, rop_exe_if.pos_y, `NUM_THREADS);
|
||||
`TRACE_ARRAY1D(1, gpu_exe_if.pos_y, `NUM_THREADS);
|
||||
`TRACE(1, (", face="));
|
||||
`TRACE_ARRAY1D(1, rop_exe_if.face, `NUM_THREADS);
|
||||
`TRACE_ARRAY1D(1, gpu_exe_if.face, `NUM_THREADS);
|
||||
`TRACE(1, (", color="));
|
||||
`TRACE_ARRAY1D(1, rop_exe_if.color, `NUM_THREADS);
|
||||
`TRACE_ARRAY1D(1, gpu_exe_if.color, `NUM_THREADS);
|
||||
`TRACE(1, (", depth="));
|
||||
`TRACE_ARRAY1D(1, rop_exe_if.depth, `NUM_THREADS);
|
||||
`TRACE(1, (", face=%b (#%0d)\n", rop_exe_if.face, rop_exe_if.uuid));
|
||||
`TRACE_ARRAY1D(1, gpu_exe_if.depth, `NUM_THREADS);
|
||||
`TRACE(1, (", face=%b (#%0d)\n", gpu_exe_if.face, gpu_exe_if.uuid));
|
||||
end
|
||||
end
|
||||
`endif
|
||||
|
|
|
|||
|
|
@ -7,9 +7,9 @@ module VX_tex_agent #(
|
|||
input wire reset,
|
||||
|
||||
// Inputs
|
||||
VX_gpu_exe_if.slave gpu_exe_if,
|
||||
VX_gpu_csr_if.slave tex_csr_if,
|
||||
VX_tex_exe_if.slave tex_exe_if,
|
||||
|
||||
|
||||
// Outputs
|
||||
VX_tex_bus_if.master tex_bus_if,
|
||||
VX_commit_if.master commit_if
|
||||
|
|
@ -41,17 +41,27 @@ module VX_tex_agent #(
|
|||
|
||||
// Store request info
|
||||
|
||||
wire [1:0][`NUM_THREADS-1:0][31:0] gpu_exe_coords;
|
||||
wire [`NUM_THREADS-1:0][`VX_TEX_LOD_BITS-1:0] gpu_exe_lod;
|
||||
wire [`VX_TEX_STAGE_BITS-1:0] gpu_exe_stage;
|
||||
|
||||
wire [UUID_WIDTH-1:0] rsp_uuid;
|
||||
wire [NW_WIDTH-1:0] rsp_wid;
|
||||
wire [`NUM_THREADS-1:0] rsp_tmask;
|
||||
wire [`XLEN-1:0] rsp_PC;
|
||||
wire [`NR_BITS-1:0] rsp_rd;
|
||||
|
||||
wire [REQ_QUEUE_BITS-1:0] mdata_waddr, mdata_raddr;
|
||||
|
||||
wire [REQ_QUEUE_BITS-1:0] mdata_waddr, mdata_raddr;
|
||||
wire mdata_full;
|
||||
|
||||
wire mdata_push = tex_exe_if.valid && tex_exe_if.ready;
|
||||
assign gpu_exe_stage = gpu_exe_if.op_mod[`VX_TEX_STAGE_BITS-1:0];
|
||||
for (genvar i = 0; i < `NUM_THREADS; ++i) begin
|
||||
assign gpu_exe_coords[0][i] = gpu_exe_if.rs1_data[i][31:0];
|
||||
assign gpu_exe_coords[1][i] = gpu_exe_if.rs2_data[i][31:0];
|
||||
assign gpu_exe_lod[i] = gpu_exe_if.rs3_data[i][0 +: `VX_TEX_LOD_BITS];
|
||||
end
|
||||
|
||||
wire mdata_push = gpu_exe_if.valid && gpu_exe_if.ready;
|
||||
wire mdata_pop = tex_bus_if.rsp_valid && tex_bus_if.rsp_ready;
|
||||
|
||||
VX_index_buffer #(
|
||||
|
|
@ -64,7 +74,7 @@ module VX_tex_agent #(
|
|||
.write_addr (mdata_waddr),
|
||||
.read_addr (mdata_raddr),
|
||||
.release_addr (mdata_raddr),
|
||||
.write_data ({tex_exe_if.wid, tex_exe_if.tmask, tex_exe_if.PC, tex_exe_if.rd}),
|
||||
.write_data ({gpu_exe_if.wid, gpu_exe_if.tmask, gpu_exe_if.PC, gpu_exe_if.rd}),
|
||||
.read_data ({rsp_wid, rsp_tmask, rsp_PC, rsp_rd}),
|
||||
.release_slot (mdata_pop),
|
||||
.full (mdata_full),
|
||||
|
|
@ -74,10 +84,10 @@ module VX_tex_agent #(
|
|||
// submit texture request
|
||||
|
||||
wire valid_in, ready_in;
|
||||
assign valid_in = tex_exe_if.valid && ~mdata_full;
|
||||
assign tex_exe_if.ready = ready_in && ~mdata_full;
|
||||
assign valid_in = gpu_exe_if.valid && ~mdata_full;
|
||||
assign gpu_exe_if.ready = ready_in && ~mdata_full;
|
||||
|
||||
wire [`TEX_REQ_TAG_WIDTH-1:0] req_tag = {tex_exe_if.uuid, mdata_waddr};
|
||||
wire [`TEX_REQ_TAG_WIDTH-1:0] req_tag = {gpu_exe_if.uuid, mdata_waddr};
|
||||
|
||||
VX_skid_buffer #(
|
||||
.DATAW (`NUM_THREADS * (1 + 2 * 32 + `VX_TEX_LOD_BITS) + `VX_TEX_STAGE_BITS + `TEX_REQ_TAG_WIDTH),
|
||||
|
|
@ -87,7 +97,7 @@ module VX_tex_agent #(
|
|||
.reset (reset),
|
||||
.valid_in (valid_in),
|
||||
.ready_in (ready_in),
|
||||
.data_in ({tex_exe_if.tmask, tex_exe_if.coords, tex_exe_if.lod, tex_exe_if.stage, req_tag}),
|
||||
.data_in ({gpu_exe_if.tmask, gpu_exe_coords, gpu_exe_lod, gpu_exe_stage, req_tag}),
|
||||
.data_out ({tex_bus_if.req_mask, tex_bus_if.req_coords, tex_bus_if.req_lod, tex_bus_if.req_stage, tex_bus_if.req_tag}),
|
||||
.valid_out (tex_bus_if.req_valid),
|
||||
.ready_out (tex_bus_if.req_ready)
|
||||
|
|
@ -122,14 +132,14 @@ module VX_tex_agent #(
|
|||
|
||||
`ifdef DBG_TRACE_TEX
|
||||
always @(posedge clk) begin
|
||||
if (tex_exe_if.valid && tex_exe_if.ready) begin
|
||||
`TRACE(1, ("%d: core%0d-tex-req: wid=%0d, PC=0x%0h, tmask=%b, u=", $time, CORE_ID, tex_exe_if.wid, tex_exe_if.PC, tex_exe_if.tmask));
|
||||
`TRACE_ARRAY1D(1, tex_exe_if.coords[0], `NUM_THREADS);
|
||||
if (gpu_exe_if.valid && gpu_exe_if.ready) begin
|
||||
`TRACE(1, ("%d: core%0d-tex-req: wid=%0d, PC=0x%0h, tmask=%b, u=", $time, CORE_ID, gpu_exe_if.wid, gpu_exe_if.PC, gpu_exe_if.tmask));
|
||||
`TRACE_ARRAY1D(1, gpu_exe_if.coords[0], `NUM_THREADS);
|
||||
`TRACE(1, (", v="));
|
||||
`TRACE_ARRAY1D(1, tex_exe_if.coords[1], `NUM_THREADS);
|
||||
`TRACE_ARRAY1D(1, gpu_exe_if.coords[1], `NUM_THREADS);
|
||||
`TRACE(1, (", lod="));
|
||||
`TRACE_ARRAY1D(1, tex_exe_if.lod, `NUM_THREADS);
|
||||
`TRACE(1, (", stage=%0d, tag=0x%0h (#%0d)\n", tex_exe_if.stage, req_tag, tex_exe_if.uuid));
|
||||
`TRACE_ARRAY1D(1, gpu_exe_if.lod, `NUM_THREADS);
|
||||
`TRACE(1, (", stage=%0d, tag=0x%0h (#%0d)\n", gpu_exe_if.stage, req_tag, gpu_exe_if.uuid));
|
||||
end
|
||||
if (commit_if.valid && commit_if.ready) begin
|
||||
`TRACE(1, ("%d: core%0d-tex-rsp: wid=%0d, PC=0x%0h, tmask=%b, rd=%0d, texels=", $time, CORE_ID, commit_if.wid, commit_if.PC, commit_if.tmask, commit_if.rd));
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue