Added runtime (kernel 2.0)

This commit is contained in:
felsabbagh3 2019-10-30 23:40:01 -04:00
parent 06e5f6df1d
commit 46b09028d0
37 changed files with 569 additions and 3866 deletions

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COMP = /opt/riscv/bin/riscv32-unknown-elf-gcc
CC_FLAGS = -march=rv32im -mabi=ilp32 -O0 -Wl,-Bstatic,-T,linker.ld -ffreestanding -nostdlib
DMP = /opt/riscv/bin/riscv32-unknown-elf-objdump
CPY = /opt/riscv/bin/riscv32-unknown-elf-objcopy
VX_LIB = ./vx_os/vx_back/vx_back.s ./vx_os/vx_back/vx_back.c ./vx_os/vx_util/queue.s
VX_IO = ./vx_os/vx_io/vx_io.s ./vx_os/vx_io/vx_io.c
VX_FR = ./vx_include/vx_front.c
all: HEX DUMP ELF
DUMP: ELF
$(DMP) -D vortex_test.elf > vortex_test.dump
HEX: ELF
$(CPY) -O ihex vortex_test.elf vortex_test.hex
ELF:
$(COMP) $(CC_FLAGS) $(VX_LIB) $(VX_IO) $(VX_FR) vx_main.c -o vortex_test.elf

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#include "vx_front.h"
#include "../vx_os/vx_back/vx_back.h"
// -------------------------- Matrix Multiplication --------------------------
static mat_mult_arg_t mat_mult_args;
void _vx_mat_mult(unsigned, unsigned);
void vx_sq_mat_mult(void * x, void * y, void * z, unsigned mat_dim)
{
mat_mult_args.x = x;
mat_mult_args.y = y;
mat_mult_args.z = z;
mat_mult_args.mat_dim = mat_dim;
unsigned num_avail_threads = vx_available_threads();
unsigned off = (mat_dim/num_avail_threads);
if ((mat_dim%num_avail_threads) != 0)
{
off += 1;
}
vx_printf("Offset: ", off);
mat_mult_args.offset = off;
if (mat_dim >= num_avail_threads)
{
vx_spawnWarps(mat_dim, num_avail_threads, _vx_mat_mult, (void *) (&mat_mult_args));
}
else
{
vx_spawnWarps(mat_dim, mat_dim, _vx_mat_mult, (void *) (&mat_mult_args));
}
unsigned num_avail_warps = vx_available_warps();
if (mat_dim > num_avail_warps)
{
vx_wait_for_warps(num_avail_warps);
}
else
{
vx_wait_for_warps(mat_dim);
}
}
void _vx_mat_mult(unsigned tid, unsigned wid)
{
mat_mult_arg_t * args = (mat_mult_arg_t *) vx_get_arg_struct();
unsigned * x_ptr = args->x;
unsigned * y_ptr = args->y;
unsigned * z_ptr = args->z;
unsigned off = args->offset;
unsigned i_index = off * tid;
if (off == 0)
{
off = 1;
i_index = tid;
}
unsigned mat_dim = args->mat_dim;
for (int iter = 0; iter < off; ++iter)
{
unsigned total = 0;
for (unsigned place = 0; place < mat_dim; ++place)
{
unsigned x_i = (wid * mat_dim) + place;
unsigned y_i = (mat_dim * place) + i_index;
total += (x_ptr[x_i] * y_ptr[y_i]);
}
int final_i = (wid * mat_dim) + i_index;
unsigned cond = i_index < mat_dim;
__if(cond)
{
z_ptr[final_i] = total;
i_index++;
}
__else
__end_if
}
// for (int z = 0; z < ((1000 * wid) + 1000); z++);
return;
}
static mat_r_arg_t mat_r_args;
// -------------------------- Matrix Addition --------------------------
void _vx_mat_add(unsigned, unsigned);
void vx_mat_add(void * x, void * y, void * z, unsigned num_rows, unsigned num_cols)
{
mat_r_args.x = x;
mat_r_args.y = y;
mat_r_args.z = z;
mat_r_args.num_cols = num_cols;
mat_r_args.num_rows = num_rows;
unsigned num_avail_threads = vx_available_threads();
unsigned off = (num_cols/num_avail_threads);
if ((num_cols%num_avail_threads) != 0)
{
off += 1;
}
mat_r_args.offset = off;
if (num_cols >= num_avail_threads)
{
vx_spawnWarps(num_rows, num_avail_threads, _vx_mat_add, (void *) (&mat_r_args));
}
else
{
vx_spawnWarps(num_rows, num_cols, _vx_mat_add, (void *) (&mat_r_args));
}
unsigned num_avail_warps = vx_available_warps();
if (num_rows > num_avail_warps)
{
vx_wait_for_warps(num_avail_warps);
}
else
{
vx_wait_for_warps(num_rows);
}
}
void _vx_mat_add(unsigned tid, unsigned wid)
{
// vx_print_str("*");
// for (int z = 0; z < ((wid * 1000) + 1000); z++);
mat_r_arg_t * args = (mat_r_arg_t *) vx_get_arg_struct();
unsigned * x_ptr = args->x;
unsigned * y_ptr = args->y;
unsigned * z_ptr = args->z;
unsigned off = args->offset;
unsigned i_index = off * tid;
if (off == 0)
{
off = 1;
i_index = tid;
}
unsigned num_cols = args->num_cols;
for (int iter = 0; iter < off; ++iter)
{
int final_i = (wid * num_cols) + i_index;
unsigned cond = i_index < num_cols;
__if(cond)
{
z_ptr[final_i] = x_ptr[final_i] + y_ptr[final_i];
i_index++;
}
__else
__end_if
}
return;
}
// -------------------------- Matrix Subtraction --------------------------
void _vx_mat_sub(unsigned, unsigned);
void vx_mat_sub(void * x, void * y, void * z, unsigned num_rows, unsigned num_cols)
{
mat_r_args.x = x;
mat_r_args.y = y;
mat_r_args.z = z;
mat_r_args.num_cols = num_cols;
mat_r_args.num_rows = num_rows;
unsigned num_avail_threads = vx_available_threads();
unsigned off = (num_cols/num_avail_threads);
if ((num_cols%num_avail_threads) != 0)
{
off += 1;
}
mat_r_args.offset = off;
if (num_cols >= num_avail_threads)
{
vx_spawnWarps(num_rows, num_avail_threads, _vx_mat_sub, (void *) (&mat_r_args));
}
else
{
vx_spawnWarps(num_rows, num_cols, _vx_mat_sub, (void *) (&mat_r_args));
}
unsigned num_avail_warps = vx_available_warps();
if (num_rows > num_avail_warps)
{
vx_wait_for_warps(num_avail_warps);
}
else
{
vx_wait_for_warps(num_rows);
}
}
void _vx_mat_sub(unsigned tid, unsigned wid)
{
// vx_print_str("*");
// for (int z = 0; z < ((wid * 1000) + 1000); z++);
mat_r_arg_t * args = (mat_r_arg_t *) vx_get_arg_struct();
unsigned * x_ptr = args->x;
unsigned * y_ptr = args->y;
unsigned * z_ptr = args->z;
unsigned off = args->offset;
unsigned i_index = off * tid;
if (off == 0)
{
off = 1;
i_index = tid;
}
unsigned num_cols = args->num_cols;
for (int iter = 0; iter < off; ++iter)
{
int final_i = (wid * num_cols) + i_index;
unsigned cond = i_index < num_cols;
__if(cond)
{
z_ptr[final_i] = x_ptr[final_i] - y_ptr[final_i];
i_index++;
}
__else
__end_if
}
return;
}
static mat_e_arg_t mat_e_args;
// --------------------------------------------------------------
void _vx_e_mat_add(unsigned, unsigned);
void vx_e_mat_add(void * x, void * scal, void * z, unsigned num_rows, unsigned num_cols)
{
mat_e_args.x = x;
mat_e_args.scal = scal;
mat_e_args.z = z;
mat_e_args.num_cols = num_cols;
mat_e_args.num_rows = num_rows;
unsigned num_avail_threads = vx_available_threads();
unsigned off = (num_cols/num_avail_threads);
if ((num_cols%num_avail_threads) != 0)
{
off += 1;
}
mat_e_args.offset = off;
if (num_cols >= num_avail_threads)
{
vx_spawnWarps(num_rows, num_avail_threads, _vx_e_mat_add, (void *) (&mat_e_args));
}
else
{
vx_spawnWarps(num_rows, num_cols, _vx_e_mat_add, (void *) (&mat_e_args));
}
unsigned num_avail_warps = vx_available_warps();
if (num_rows > num_avail_warps)
{
vx_wait_for_warps(num_avail_warps);
}
else
{
vx_wait_for_warps(num_rows);
}
}
void _vx_e_mat_add(unsigned tid, unsigned wid)
{
// vx_print_str("*");
// for (int z = 0; z < ((wid * 1000) + 1000); z++);
mat_e_arg_t * args = (mat_e_arg_t *) vx_get_arg_struct();
unsigned * x_ptr = args->x;
unsigned scal = *((unsigned *) args->scal);
unsigned * z_ptr = args->z;
unsigned off = args->offset;
unsigned i_index = off * tid;
if (off == 0)
{
off = 1;
i_index = tid;
}
unsigned num_cols = args->num_cols;
for (int iter = 0; iter < off; ++iter)
{
int final_i = (wid * num_cols) + i_index;
unsigned cond = i_index < num_cols;
__if(cond)
{
z_ptr[final_i] = x_ptr[final_i] + scal;
i_index++;
}
__else
__end_if
}
return;
}
void _vx_e_mat_mult(unsigned, unsigned);
void vx_e_mat_mult(void * x, void * scal, void * z, unsigned num_rows, unsigned num_cols)
{
mat_e_args.x = x;
mat_e_args.scal = scal;
mat_e_args.z = z;
mat_e_args.num_cols = num_cols;
mat_e_args.num_rows = num_rows;
unsigned num_avail_threads = vx_available_threads();
unsigned off = (num_cols/num_avail_threads);
if ((num_cols%num_avail_threads) != 0)
{
off += 1;
}
mat_e_args.offset = off;
if (num_cols >= num_avail_threads)
{
vx_spawnWarps(num_rows, num_avail_threads, _vx_e_mat_mult, (void *) (&mat_e_args));
}
else
{
vx_spawnWarps(num_rows, num_cols, _vx_e_mat_mult, (void *) (&mat_e_args));
}
unsigned num_avail_warps = vx_available_warps();
if (num_rows > num_avail_warps)
{
vx_wait_for_warps(num_avail_warps);
}
else
{
vx_wait_for_warps(num_rows);
}
}
void _vx_e_mat_mult(unsigned tid, unsigned wid)
{
// vx_print_str("*");
// for (int z = 0; z < ((wid * 1000) + 1000); z++);
mat_e_arg_t * args = (mat_e_arg_t *) vx_get_arg_struct();
unsigned * x_ptr = args->x;
unsigned scal = *((unsigned *) args->scal);
unsigned * z_ptr = args->z;
unsigned off = args->offset;
unsigned i_index = off * tid;
if (off == 0)
{
off = 1;
i_index = tid;
}
unsigned num_cols = args->num_cols;
for (int iter = 0; iter < off; ++iter)
{
int final_i = (wid * num_cols) + i_index;
unsigned cond = i_index < num_cols;
__if(cond)
{
z_ptr[final_i] = x_ptr[final_i] * scal;
i_index++;
}
__else
__end_if
}
return;
}

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@ -1,55 +0,0 @@
#include "../vx_os/vx_back/vx_back.h"
#include "../vx_os/vx_io/vx_io.h"
// -------------------------- Matrix Multiplication --------------------------
typedef struct
{
void * x;
void * y;
void * z;
unsigned mat_dim;
unsigned offset;
} mat_mult_arg_t;
void vx_sq_mat_mult(void *, void *, void *, unsigned);
// --------------------------------------------------------------------------
typedef struct
{
void * x;
void * y;
void * z;
unsigned num_cols;
unsigned num_rows;
unsigned offset;
} mat_r_arg_t;
// -------------------------- Matrix Addition -----------------------------
void vx_mat_add(void *, void *, void *, unsigned, unsigned);
// -------------------------- Matrix Subtraction --------------------------
void vx_mat_sub(void *, void *, void *, unsigned, unsigned);
// -----------------------------------------------------------------------
typedef struct
{
void * x;
void * scal;
void * z;
unsigned num_cols;
unsigned num_rows;
unsigned offset;
} mat_e_arg_t;
// -------------------------- Matrix element Addition ------------------
void vx_e_mat_add(void *, void *, void *, unsigned, unsigned);
// -------------------------- Matrix element Addition ------------------
void vx_e_mat_mult(void *, void *, void *, unsigned, unsigned);

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@ -1,70 +0,0 @@
#include "./vx_include/vx_front.h"
unsigned x[1024] = {0};
unsigned y[1024] = {0};
unsigned z[1024] = {0};
#define MAT_DIM 16
#define NUM_COLS 16
#define NUM_ROWS 16
void initialize_mats()
{
for (int i = 0; i < (MAT_DIM * MAT_DIM); i++)
{
x[i] = 3;
y[i] = 2;
}
}
void print_matrix(unsigned * z)
{
vx_print_str("-------------------------------\n");
for (int j = 0; j < (MAT_DIM * MAT_DIM); j++)
{
if (j!=0) if ((j % MAT_DIM) == 0) vx_print_str("\n");
vx_print_hex(z[j]);
vx_print_str(" ");
}
vx_print_str("\n-------------------------------\n");
}
int main()
{
initialize_mats();
// matrix multiplication
vx_sq_mat_mult(x, y, z, MAT_DIM);
vx_print_str("\n\nMatrix multiplication\n");
print_matrix(z);
// matrix addition
vx_mat_add(x, y, z, NUM_ROWS, NUM_COLS);
vx_print_str("\n\nMatrix Addition\n");
print_matrix(z);
// matrix sub
vx_mat_sub(x, y, z, NUM_ROWS, NUM_COLS);
vx_print_str("\n\nMatrix Subtraction\n");
print_matrix(z);
unsigned scal = 3;
// matrix element add
vx_e_mat_add(z, &scal, z, NUM_ROWS, NUM_COLS);
vx_print_str("\n\nMatrix Element Addition\n");
print_matrix(z);
// matrix element add
vx_e_mat_mult(z, &scal, z, NUM_ROWS, NUM_COLS);
vx_print_str("\n\nMatrix Element Addition\n");
print_matrix(z);
return 0;
}

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#include "vx_back.h"
#include "../vx_io/vx_io.h"
void vx_before_main()
{
// unsigned num_available_warps = vx_available_warps();
for (int i = 0; i < 8; i++)
{
queue_initialize(q + i);
}
}
void vx_reschedule_warps()
{
register unsigned curr_warp asm("s10");
// vx_printf("Reschedule: ", curr_warp);
if (queue_isEmpty(q+curr_warp))
{
// vx_printf("Done: ", curr_warp);
done[curr_warp] = 1;
if (curr_warp == 0)
{
vx_load_context();
return;
}
ECALL;
}
Job j;
queue_dequeue(q+curr_warp,&j);
// vx_printf("Reschedule -> ", j.wid);
asm __volatile__("mv sp,%0"::"r" (j.base_sp):);
vx_createThreads(j.n_threads, j.wid, j.func_ptr, j.args, j.assigned_warp);
ECALL;
}
void vx_schedule_warps()
{
unsigned num_available_warps = vx_available_warps();
asm __volatile__("mv s3, sp");
for (int curr_warp = 1; curr_warp < num_available_warps; ++curr_warp)
{
if (!queue_isEmpty(q+curr_warp))
{
Job j;
queue_dequeue(q+curr_warp,&j);
asm __volatile__("mv sp,%0"::"r" (j.base_sp):);
vx_wspawn(j.n_threads, j.wid, j.func_ptr, j.args, j.assigned_warp);
}
}
asm __volatile__("mv sp, s3");
vx_save_context();
// vx_print_str("saved context\n");
register unsigned val asm("tp");
if (val)
{
if (!queue_isEmpty(q))
{
// vx_print_str("found something for w0\n");
Job j;
queue_dequeue(q,&j);
// vx_printf("num_threads: ", j.n_threads);
asm __volatile__("mv sp,%0"::"r" (j.base_sp):);
vx_createThreads(j.n_threads, j.wid, j.func_ptr, j.args, j.assigned_warp);
}
}
}
void vx_spawnWarps(unsigned num_Warps, unsigned num_threads, FUNC, void * args)
{
vx_before_main();
unsigned num_available_warps = vx_available_warps();
// vx_printf("Num available warps: ", num_available_warps);
asm __volatile__("addi s2, sp, 0");
int warp = 0;
for (unsigned i = 0; i < num_Warps; i++)
{
asm __volatile__("lui s3, 0xFFFF0");
asm __volatile__("add sp, sp, s3");
register unsigned stack_ptr asm("sp");
Job j;
j.wid = i;
j.n_threads = num_threads;
j.base_sp = stack_ptr;
j.func_ptr = (unsigned) func;
j.args = args;
j.assigned_warp = warp;
queue_enqueue(q + warp,&j);
++warp;
if (warp >= num_available_warps) warp = 0;
}
asm __volatile__("addi sp, s2, 0");
vx_schedule_warps();
}
void vx_wait_for_warps(unsigned num_wait)
{
// vx_printf("wait for: ", num_wait);
unsigned num_available_warps = vx_available_warps();
unsigned num = 0;
while (num != num_wait)
{
num = 0;
for (int i = 0; i < num_available_warps; i++)
{
if (done[i] == 1)
{
num += 1;
}
}
}
// vx_printf("num found: ", num);
for (int i = 0; i < num_available_warps; i++) done[i] = 0;
}
void * vx_get_arg_struct(void)
{
register void *ret asm("s7");
return ret;
}

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#pragma once
#include <stdbool.h>
#include "../vx_util/queue.h"
#define WSPAWN asm __volatile__(".word 0x3006b"::);
#define CLONE asm __volatile__(".word 0x3506b":::);
#define JALRS asm __volatile__(".word 0x1bfe0eb":::"s10");
#define ECALL asm __volatile__(".word 0x00000073");
#define JMPRT asm __volatile__(".word 0x5406b");
#define SPLIT asm __volatile__(".word 0xf206b");
#define P_JUMP asm __volatile__(".word 0x1ff707b");
#define JOIN asm __volatile__(".word 0x306b");
#define __if(val) bool temp = !val; \
register unsigned p asm("t5") = temp; \
register void * e asm("t6") = &&ELSE; \
SPLIT; \
P_JUMP; \
#define __else register void * w asm("t3") = &&AFTER; \
asm __volatile__("jr t3"); \
ELSE: asm __volatile__("nop");
#define __end_if AFTER:\
JOIN;
static int done[] = {0, 0, 0, 0, 0, 0, 0};
static int main_sp[1];
unsigned context[32];
void vx_save_context(void);
void vx_load_context(void);
#define FUNC void (func)(unsigned, unsigned)
unsigned vx_available_warps(void);
unsigned vx_available_threads(void);
void vx_createThreads(unsigned, unsigned, unsigned, void *, unsigned);
void vx_wspawn(unsigned, unsigned, unsigned, void *, unsigned);
void vx_spawnWarps(unsigned num_Warps, unsigned num_threads, FUNC, void *);
void vx_schedule_warps(void);
void vx_reschedule_warps(void);
void vx_wait_for_warps(unsigned);
void * vx_get_arg_struct(void);

View file

@ -1,151 +0,0 @@
.section .text
.type _start, @function
.global _start
_start:
li a0, 2 # Num Warps
csrw 0x20, a0 # Setting the number of available warps
li a0, 1 # Num Threads
csrw 0x21, a0 # Setting the number of available threads
csrw mhartid,zero
csrw misa,zero
lui sp, 0x7ffff
jal vx_before_main
jal main
ecall
.type vx_createThreads, @function
.global vx_createThreads
vx_createThreads:
mv s7 ,a3 # Moving args to s7
mv s10,a4 # Moving assigned_warp to s10
mv t5 ,sp # Saving the current stack pointer to t5
mv t2 , a0 # t2 = num_threads
loop_init:
li a0,1 # i = 0
loop_cond:
bge a0, t2, loop_done # i < num_threads
loop_body:
addi sp,sp,-2048 # Allocate 2k stack for new thread
mv t1, a0 # #lane = i
.word 0x3506b # clone register state
loop_inc:
addi a0, a0, 1
j loop_cond
loop_done:
mv sp,t5 # Restoring the stack
li a0,0 # setting tid = 0 for main thread
mv t6,a2 # setting func_addr
mv s11,t2 # setting num_threads to spawn
.word 0x1bfe0eb
la a0, vx_reschedule_warps
.word 0x5406b
.type vx_wspawn, @function
.global vx_wspawn
vx_wspawn:
la t1, vx_createThreads
.word 0x3006b # WSPAWN instruction
ret
.global context
.type vx_save_context, @function
.global vx_save_context
vx_save_context:
la tp, context
sw x0 , 0 (tp)
sw x1 , 4 (tp)
sw x2 , 8 (tp)
sw x3 , 12(tp)
sw x4 , 16(tp)
sw x5 , 20(tp)
sw x6 , 24(tp)
sw x7 , 28(tp)
sw x8 , 32(tp)
sw x9 , 36(tp)
sw x10, 40(tp)
sw x11, 44(tp)
sw x12, 48(tp)
sw x13, 52(tp)
sw x14, 56(tp)
sw x15, 60(tp)
sw x16, 64(tp)
sw x17, 68(tp)
sw x18, 72(tp)
sw x19, 76(tp)
sw x20, 80(tp)
sw x21, 84(tp)
sw x22, 88(tp)
sw x23, 92(tp)
sw x24, 96(tp)
sw x25, 100(tp)
sw x26, 104(tp)
sw x27, 108(tp)
sw x28, 112(tp)
sw x29, 116(tp)
sw x30, 120(tp)
sw x31, 124(tp)
li tp, 1
ret
.type vx_load_context, @function
.global vx_load_context
vx_load_context:
la tp, context
lw x0 , 0 (tp)
lw x1 , 4 (tp)
lw x2 , 8 (tp)
lw x3 , 12(tp)
lw x4 , 16(tp)
lw x5 , 20(tp)
lw x6 , 24(tp)
lw x7 , 28(tp)
lw x8 , 32(tp)
lw x9 , 36(tp)
lw x10, 40(tp)
lw x11, 44(tp)
lw x12, 48(tp)
lw x13, 52(tp)
lw x14, 56(tp)
lw x15, 60(tp)
lw x16, 64(tp)
lw x17, 68(tp)
lw x18, 72(tp)
lw x19, 76(tp)
lw x20, 80(tp)
lw x21, 84(tp)
lw x22, 88(tp)
lw x23, 92(tp)
lw x24, 96(tp)
lw x25, 100(tp)
lw x26, 104(tp)
lw x27, 108(tp)
lw x28, 112(tp)
lw x29, 116(tp)
lw x30, 120(tp)
lw x31, 124(tp)
li tp, 0
ret
.type vx_available_warps, @function
.global vx_available_warps
vx_available_warps:
csrr a0, 0x20
ret
.type vx_available_threads, @function
.global vx_available_threads
vx_available_threads:
csrr a0, 0x21
ret

Binary file not shown.

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@ -1,29 +0,0 @@
#include "vx_io.h"
void vx_print_hex(unsigned f)
{
if (f < 16)
{
vx_print_str(hextoa[f]);
return;
}
int temp;
int sf = 32;
bool start = false;
do
{
temp = (f >> (sf - 4)) & 0xf;
if (temp != 0) start = true;
if (start) vx_print_str(hextoa[temp]);
sf -= 4;
} while(sf > 0);
}
void vx_printf(char * c, unsigned f)
{
vx_print_str(c);
vx_print_hex(f);
vx_print_str("\n");
}

View file

@ -1,49 +0,0 @@
#ifndef __QUEUE__
#define __QUEUE__
#define SIZE 50
#define WARPS 7
typedef struct Job_t
{
unsigned wid;
unsigned n_threads;
unsigned base_sp;
unsigned func_ptr;
void * args;
unsigned assigned_warp;
} Job;
typedef struct Queue_t
{
unsigned start_i;
unsigned end_i;
unsigned num_j;
unsigned total_warps;
unsigned active_warps;
struct Job_t jobs[SIZE];
} Queue;
Queue q[8];
void queue_initialize(Queue *);
void queue_enqueue(Queue *, Job *);
void queue_dequeue(Queue *, Job *);
int queue_isFull(Queue *);
int queue_isEmpty(Queue *);
int queue_availableWarps(Queue *);
void func();
#endif

View file

@ -1,123 +0,0 @@
.equ A_WARPS, 7
.equ SIZE, 50
.section .text
.type queue_initialize, @function
.global queue_initialize
queue_initialize:
mv t0, a0 # loading base address of q
li t1, 0 # to initialize variables
li t2, A_WARPS # Num of available warps
sw t1, 0 (t0) # start_i
sw t1, 4 (t0) # end_i
sw t1, 8 (t0) # num_j
sw t2, 12(t0) # total_warps
sw t1, 16(t0) # active_warps
ret
.type queue_enqueue, @function
.global queue_enqueue
queue_enqueue:
mv t0, a0 # loding base address of q
lw t1, 8 (t0) # t1 = num_j
addi t1, t1, 1 # ++t1
sw t1, 8 (t0) # num_j = t1
addi t1, t0, 20 # t1 = jobs_addr
lw t4, 4 (t0) # t4 = end_i
slli t2, t4, 5 # index * 32 [log(sizeof(job))]
add t1, t1, t2 # jobs + index
lw t3, 0 (a1) # wid
sw t3, 0 (t1) #
lw t3, 4 (a1) # n_threads
sw t3, 4 (t1) #
lw t3, 8 (a1) # base_sp
sw t3, 8 (t1) #
lw t3, 12(a1) # func_ptr
sw t3, 12(t1) #
lw t3, 16(a1) # args
sw t3, 16(t1) #
lw t3, 20(a1) # assigned_warp
sw t3, 20(t1) #
addi t4, t4, 1 # end_i++
li t5, SIZE # size
bne t4, t5, ec # if ((q.end_i + 1) == SIZE)
mv t4, zero
ec:
sw t4, 4 (t0) # end_i
ret
.type queue_dequeue, @function
.global queue_dequeue
queue_dequeue:
mv t0, a0 # loading base address of q
lw t1, 8 (t0) # t1 = num_j
addi t1, t1, -1 # --t1
sw t1, 8 (t0) # num_j = t1
addi t1, t0, 20 # t1 = jobs_addr
lw t4, 0 (t0) # t4 = start_i
li t6, SIZE # size
mv t5, t4 # t5 = start_i
addi t5, t5, 1 # t5++
bne t5, t6, dc # if ((q.start_i + 1) == SIZE)
mv t5, zero
dc:
sw t5, 0(t0) # storing start_i
slli t2, t4, 5 # index * 32 [log(sizeof(job))]
add t1, t1, t2 # jobs + index
lw t3, 0 (t1) # wid
sw t3, 0 (a1) #
lw t3, 4 (t1) # n_threads
sw t3, 4 (a1) #
lw t3, 8 (t1) # base_sp
sw t3, 8 (a1) #
lw t3, 12(t1) # func_ptr
sw t3, 12(a1) #
lw t3, 16(t1) # args
sw t3, 16(a1) #
lw t3, 20(t1) # assigned_warp
sw t3, 20(a1) #
ret
.type queue_isFull, @function
.global queue_isFull
queue_isFull:
mv t0, a0 # loading base address of q
lw t1, 8 (t0) # t1 = num_j
mv a0, zero # ret_val = 0
li t3, SIZE # t3 = SIZE
bne t3, t1, qf # if (num_j == 1)
addi a0, a0, 1 # ret_val = 1;
qf:
ret
.type queue_isEmpty, @function
.global queue_isEmpty
queue_isEmpty:
mv t0, a0 # loading base address of q
lw t1, 8 (t0) # t1 = num_j
mv a0, zero # ret_val = 0
mv t3, zero # t3 = 0
bne t3, t1, qe # if (num_j == 0)
addi a0, a0, 1 # ret_val = 1;
qe:
ret
.type queue_availableWarps, @function
.global queue_availableWarps
queue_availableWarps:
mv t0, a0 # loading base address of q
lw t1, 12(t0) # t1 = total_warps
lw t2, 16(t0) # t2 = active_warps
sltu a0, t2, t1
ret

View file

@ -4,21 +4,6 @@
void vx_print_hex(unsigned f)
{
vx_print_str(hextoa[f]);
// if (f < 16)
// {
// vx_print_str(hextoa[f]);
// return;
// }
// int temp;
// int sf = 32;
// bool start = false;
// do
// {
// temp = (f >> (sf - 4)) & 0xf;
// if (temp != 0) start = true;
// if (start) vx_print_str(hextoa[temp]);
// sf -= 4;
// } while(sf > 0);
}

View file

@ -57,7 +57,7 @@ module VX_dmem_controller (
`ifdef SYN
.CACHE_WAYS(1),
`else
.CACHE_WAYS(4),
.CACHE_WAYS(2),
`endif
.CACHE_BLOCK(128), // Bytes
.CACHE_BANKS(8),

View file

@ -1,126 +0,0 @@
###############################################################################
#
# ICARUS VERILOG & GTKWAVE MAKEFILE
# MADE BY WILLIAM GIBB FOR HACDC
# williamgibb@gmail.com
#
# USE THE FOLLOWING COMMANDS WITH THIS MAKEFILE
# "make check" - compiles your verilog design - good for checking code
# "make simulate" - compiles your design+TB & simulates your design
# "make display" - compiles, simulates and displays waveforms
#
###############################################################################
#
# CHANGE THESE THREE LINES FOR YOUR DESIGN
#
#TOOL INPUT
SRC = \
vortex_tb.v \
../VX_define.v \
../interfaces/VX_branch_response_inter.v \
../interfaces/VX_csr_req_inter.v \
../interfaces/VX_csr_wb_inter.v \
../interfaces/VX_dcache_request_inter.v \
../interfaces/VX_dcache_response_inter.v \
../interfaces/VX_dram_req_rsp_inter.v \
../interfaces/VX_exec_unit_req_inter.v \
../interfaces/VX_frE_to_bckE_req_inter.v \
../interfaces/VX_gpr_clone_inter.v \
../interfaces/VX_gpr_data_inter.v \
../interfaces/VX_gpr_jal_inter.v \
../interfaces/VX_gpr_read_inter.v \
../interfaces/VX_gpr_wspawn_inter.v \
../interfaces/VX_gpu_inst_req_inter.v \
../interfaces/VX_icache_request_inter.v \
../interfaces/VX_icache_response_inter.v \
../interfaces/VX_inst_exec_wb_inter.v \
../interfaces/VX_inst_mem_wb_inter.v \
../interfaces/VX_inst_meta_inter.v \
../interfaces/VX_jal_response_inter.v \
../interfaces/VX_join_inter.v \
../interfaces/VX_lsu_req_inter.v \
../interfaces/VX_mem_req_inter.v \
../interfaces/VX_mw_wb_inter.v \
../interfaces/VX_warp_ctl_inter.v \
../interfaces/VX_wb_inter.v \
../interfaces/VX_wstall_inter.v \
../VX_alu.v \
../VX_back_end.v \
../VX_csr_handler.v \
../VX_csr_wrapper.v \
../VX_decode.v \
../VX_dmem_controller.v \
../VX_execute_unit.v \
../VX_fetch.v \
../VX_front_end.v \
../VX_generic_priority_encoder.v \
../VX_generic_register.v \
../VX_generic_stack.v \
../VX_gpgpu_inst.v \
../VX_gpr.v \
../VX_gpr_stage.v \
../VX_gpr_wrapper.v \
../VX_inst_multiplex.v \
../VX_lsu.v \
../VX_lsu_addr_gen.v \
../VX_one_counter.v \
../VX_priority_encoder.v \
../VX_priority_encoder_w_mask.v \
../VX_rename.v \
../VX_scheduler.v \
../VX_warp.v \
../VX_warp_scheduler.v \
../VX_writeback.v \
../Vortex.v \
../byte_enabled_simple_dual_port_ram.v \
../cache/VX_Cache_Bank.v \
../cache/VX_Cache_Block_DM.v \
../cache/VX_cache_bank_valid.v \
../cache/VX_cache_data.v \
../cache/VX_d_cache.v \
../cache/VX_d_cache_encapsulate.v \
../cache/VX_d_cache_tb.v \
../cache/VX_generic_pe.v \
../cache/bank.v \
../cache/cache_set.v \
../pipe_regs/VX_d_e_reg.v \
../pipe_regs/VX_f_d_reg.v \
../shared_memory/VX_bank_valids.v \
../shared_memory/VX_priority_encoder_sm.v \
../shared_memory/VX_set_bit.v \
../shared_memory/VX_shared_memory.v \
../shared_memory/VX_shared_memory_block.v
TESTBENCH = vortex_tb.v
TBOUTPUT = waves.lxt #THIS NEEDS TO MATCH THE OUTPUT FILE
#FROM YOUR TESTBENCH
###############################################################################
# BE CAREFUL WHEN CHANGING ITEMS BELOW THIS LINE
###############################################################################
#TOOLS
COMPILER = iverilog
SIMULATOR = vvp
VIEWER = gtkwave
#TOOL OPTIONS
COFLAGS = -v -o
SFLAGS = -v
SOUTPUT = -lxt #SIMULATOR OUTPUT TYPE
#TOOL OUTPUT
COUTPUT = compiler.out #COMPILER OUTPUT
###############################################################################
#MAKE DIRECTIVES
check : $(TESTBENCH) $(SRC)
$(COMPILER) -g2012 -o vortex $(SRC) -I../ -I.
simulate: $(COUTPUT)
$(SIMULATOR) $(SFLAGS) $(COUTPUT) $(SOUTPUT)
display: $(TBOUTPUT)
$(VIEWER) $(TBOUTPUT) &
#MAKE DEPENDANCIES
$(TBOUTPUT): $(COUTPUT)
$(SIMULATOR) $(SOPTIONS) $(COUTPUT) $(SOUTPUT)
$(COUTPUT): $(TESTBENCH) $(SRC)
$(COMPILER) $(COFLAGS) $(COUTPUT) $(TESTBENCH) $(SRC)

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@ -1,2 +0,0 @@

View file

@ -1,57 +0,0 @@
// `include "../VX_define.v"
// `include "../Vortex.v"
`timescale 1ns/1ps
module vortex_tb (
);
reg clk;
reg reset;
reg[31:0] icache_response_instruction;
reg[31:0] icache_request_pc_address;
// IO
reg io_valid;
reg[31:0] io_data;
// Req
reg [31:0] o_m_read_addr;
reg [31:0] o_m_evict_addr;
reg o_m_valid;
reg [31:0] o_m_writedata[8 - 1:0][4-1:0];
reg o_m_read_or_write;
// Rsp
reg [31:0] i_m_readdata[8 - 1:0][4-1:0];
reg i_m_ready;
reg out_ebreak;
initial begin
while (!out_ebreak) begin
icache_response_instruction = 0;
end
end
Vortex vortex(
.clk (clk),
.reset (reset),
.icache_response_instruction(icache_response_instruction),
.icache_request_pc_address (icache_request_pc_address),
.io_valid (io_valid),
.io_data (io_data),
.o_m_read_addr (o_m_read_addr),
.o_m_evict_addr (o_m_evict_addr),
.o_m_valid (o_m_valid),
.o_m_writedata (o_m_writedata),
.o_m_read_or_write (o_m_read_or_write),
.i_m_readdata (i_m_readdata),
.i_m_ready (i_m_ready),
.out_ebreak (out_ebreak)
);
always @(clk) #5 clk <= ~clk;
endmodule

View file

@ -109,8 +109,8 @@ comp:
sim: comp
vsim vortex_tb $(LOG) -c -lib $(LIB) $(CMD) > vortex_sim.log
# vsim -novopt vortex_tb $(LOG) -c -lib $(LIB) $(CMD) > vortex_sim.log
# vsim vortex_tb $(LOG) -c -lib $(LIB) $(CMD) > vortex_sim.log
vsim -novopt vortex_tb $(LOG) -c -lib $(LIB) $(CMD) > vortex_sim.log

View file

@ -17,7 +17,7 @@ extern "C" {
void ibus_driver (bool clk, unsigned pc_addr, unsigned * instruction);
void dbus_driver (bool clk, unsigned o_m_read_addr, unsigned o_m_evict_addr, bool o_m_valid, svLogicVecVal * o_m_writedata, bool o_m_read_or_write, svLogicVecVal * i_m_readdata, bool * i_m_ready);
void io_handler (bool clk, bool io_valid, unsigned io_data);
void gracefulExit();
void gracefulExit(int);
}
RAM ram;
@ -50,11 +50,11 @@ void ibus_driver(bool clk, unsigned pc_addr, unsigned * instruction)
// printf("Inside ibus_driver\n");
if (clk)
{
num_cycles++;
(*instruction) = 0;
}
else
{
num_cycles++;
uint32_t curr_inst = 0;
curr_inst = 0xdeadbeef;
@ -200,10 +200,10 @@ void io_handler(bool clk, bool io_valid, unsigned io_data)
}
}
void gracefulExit()
void gracefulExit(int cycles)
{
fprintf(stderr, "Num Cycles: %d\n", num_cycles);
fprintf(stderr, "\n*********************\n\n");
fprintf(stderr, "DPI Cycle Num: %d\tVerilog Cycle Num: %d\n", num_cycles, cycles);
}

View file

@ -27,13 +27,13 @@ import "DPI-C" dbus_driver = function void dbus_driver( input logic clk,
import "DPI-C" io_handler = function void io_handler(input logic clk, input logic io_valid, input int io_data);
import "DPI-C" gracefulExit = function void gracefulExit();
import "DPI-C" gracefulExit = function void gracefulExit(input int cycle_num);
module vortex_tb (
);
reg[31:0] cycle_num;
int cycle_num;
reg clk;
reg reset;
@ -61,7 +61,7 @@ module vortex_tb (
initial begin
// $fdumpfile("vortex1.vcd");
load_file("../../kernel/vortex_test.hex");
load_file("../../runtime/vortex_runtime.hex");
$dumpvars(0, vortex_tb);
reset = 1;
clk = 0;
@ -87,13 +87,24 @@ module vortex_tb (
.out_ebreak (out_ebreak)
);
always @(*) begin
always @(negedge clk) begin
ibus_driver(clk, icache_request_pc_address, icache_response_instruction);
dbus_driver(clk, o_m_read_addr, o_m_evict_addr, o_m_valid, o_m_writedata, o_m_read_or_write, i_m_readdata, i_m_ready);
io_handler (clk, io_valid, io_data);
end
always @(posedge clk) begin
if (out_ebreak) begin
gracefulExit(cycle_num);
#40 $finish;
end
end
always @(posedge clk) begin
cycle_num = cycle_num + 1;
end
always @(clk, posedge reset) begin
if (reset) begin
reset = 0;
@ -102,11 +113,6 @@ module vortex_tb (
#5 clk <= ~clk;
if (out_ebreak) begin
gracefulExit();
#20 $finish;
end
end
endmodule

24
runtime/Makefile Normal file
View file

@ -0,0 +1,24 @@
COMP = /opt/riscv/bin/riscv32-unknown-elf-gcc
CC_FLAGS = -march=rv32im -mabi=ilp32 -O0 -Wl,-Bstatic,-T,linker.ld -ffreestanding -nostdlib
DMP = /opt/riscv/bin/riscv32-unknown-elf-objdump
CPY = /opt/riscv/bin/riscv32-unknown-elf-objcopy
VX_STR = ./startup/vx_start.s
VX_INT = ./intrinsics/vx_intrinsics.s
VX_IO = ./io/vx_io.s ./io/vx_io.c
VX_MAIN = ./vx_main.c
all: HEX DUMP ELF
DUMP: ELF
$(DMP) -D vortex_runtime.elf > vortex_runtime.dump
HEX: ELF
$(CPY) -O ihex vortex_runtime.elf vortex_runtime.hex
ELF:
$(COMP) $(CC_FLAGS) $(VX_STR) $(VX_INT) $(VX_IO) $(VX_MAIN) -o vortex_runtime.elf

View file

@ -0,0 +1,24 @@
// Spawns Warps
void vx_wspawn (unsigned numWarps, unsigned PC_spawn);
// Changes thread mask (activated/deactivates threads)
void vx_tmc (unsigned numThreads);
// Warp Barrier
void vx_barrier(unsigned barriedID, unsigned numWarps);
// split on a predicate
void vx_split (unsigned predicate);
// Join
void vx_join (void);
// Get Hardware thread ID
unsigned vx_threadID(void);
// Get hardware warp ID
unsigned vx_warpID(void);

View file

@ -0,0 +1,50 @@
.section .text
.type vx_wsapwn, @function
.global vx_wsapwn
vx_wsapwn:
.word 0x00b5106b # wspawn a0(numWarps), a1(PC SPAWN)
ret
.type vx_tmc, @function
.global vx_tmc
vx_tmc:
.word 0x0005006b # tmc a0
ret
.type vx_barrier, @function
.global vx_barrier
vx_barrier:
.word 0x00b5406b # barrier a0(barrier id), a1(numWarps)
ret
.type vx_split, @function
.global vx_split
vx_split:
.word 0x0005206b # split a0
.type vx_join, @function
.global vx_join
vx_join:
.word 0x0000306b #join
ret
.type vx_warpID, @function
.global vx_warpID
vx_warpID:
csrr a0, 0x21 # read warp IDs
ret
.type vx_threadID, @function
.global vx_threadID
vx_threadID:
csrr a0, 0x20 # read thread IDs
ret

30
runtime/io/vx_io.c Normal file
View file

@ -0,0 +1,30 @@
#include "vx_io.h"
void vx_print_hex(unsigned f)
{
vx_print_str(hextoa[f]);
// if (f < 16)
// {
// vx_print_str(hextoa[f]);
// return;
// }
// int temp;
// int sf = 32;
// bool start = false;
// do
// {
// temp = (f >> (sf - 4)) & 0xf;
// if (temp != 0) start = true;
// if (start) vx_print_str(hextoa[temp]);
// sf -= 4;
// } while(sf > 0);
}
void vx_printf(char * c, unsigned f)
{
vx_print_str(c);
vx_print_hex(f);
vx_print_str("\n");
}

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@ -6,4 +6,5 @@
static char * hextoa[] = {"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "a", "b", "c", "d", "e", "f"};
void vx_print_hex(unsigned);
void vx_print_str(char *);
void vx_printf(char *, unsigned);
void vx_printf(char *, unsigned);
void vx_printc(unsigned, char c);

View file

@ -22,8 +22,8 @@ be:
.type vx_printc, @function
.global vx_printc
vx_printc:
la a7, 0x00010000
sw a1, 0(a7)
la t0, 0x00010000
sw a1, 0(t0)
ret

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@ -0,0 +1,42 @@
.type _start, @function
.global _start
_start:
li a0, 4
.word 0x0005006b # tmc a0
csrr a1,0x20
slli a1, a1, 2
la a2, 0x20000000
add a2, a2, a1
sw a1, 0(a2)
la a2, 0x40000000
add a2, a2, a1
li a3, 5
sw a3, 0(a2)
la a2, 0x80000000
add a2, a2, a1
li a3, 7
sw a3, 0(a2)
la a2, 0x60000000
add a2, a2, a1
li a3, 7
sw a3, 0(a2)
la a2, 0x20000000
add a2, a2, a1
lw a4, 0(a2)
li a0, 0
.word 0x0005006b # tmc a0
##########################
# lui sp, 0x7ffff
# jal main
# li a0, 0
# .word 0x0005006b # tmc a0

293
runtime/vortex_runtime.dump Normal file
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@ -0,0 +1,293 @@
vortex_runtime.elf: file format elf32-littleriscv
Disassembly of section .text:
80000000 <_start>:
80000000: 00400513 li a0,4
80000004: 0005006b 0x5006b
80000008: 020025f3 csrr a1,0x20
8000000c: 00259593 slli a1,a1,0x2
80000010: 20000637 lui a2,0x20000
80000014: 00b60633 add a2,a2,a1
80000018: 00b62023 sw a1,0(a2) # 20000000 <_start-0x60000000>
8000001c: 40000637 lui a2,0x40000
80000020: 00b60633 add a2,a2,a1
80000024: 00500693 li a3,5
80000028: 00d62023 sw a3,0(a2) # 40000000 <_start-0x40000000>
8000002c: 80000637 lui a2,0x80000
80000030: 00b60633 add a2,a2,a1
80000034: 00700693 li a3,7
80000038: 00d62023 sw a3,0(a2) # 80000000 <arr+0xfefffefc>
8000003c: 60000637 lui a2,0x60000
80000040: 00b60633 add a2,a2,a1
80000044: 00700693 li a3,7
80000048: 00d62023 sw a3,0(a2) # 60000000 <_start-0x20000000>
8000004c: 20000637 lui a2,0x20000
80000050: 00b60633 add a2,a2,a1
80000054: 00062703 lw a4,0(a2) # 20000000 <_start-0x60000000>
80000058: 00000513 li a0,0
8000005c: 0005006b 0x5006b
80000060 <vx_wsapwn>:
80000060: 00b5106b 0xb5106b
80000064: 00008067 ret
80000068 <vx_tmc>:
80000068: 0005006b 0x5006b
8000006c: 00008067 ret
80000070 <vx_barrier>:
80000070: 00b5406b 0xb5406b
80000074: 00008067 ret
80000078 <vx_split>:
80000078: 0005206b 0x5206b
8000007c <vx_join>:
8000007c: 0000306b 0x306b
80000080: 00008067 ret
80000084 <vx_warpID>:
80000084: 02102573 csrr a0,0x21
80000088: 00008067 ret
8000008c <vx_threadID>:
8000008c: 02002573 csrr a0,0x20
80000090: 00008067 ret
80000094 <vx_print_str>:
80000094: ff410113 addi sp,sp,-12
80000098: 00112023 sw ra,0(sp)
8000009c: 00b12223 sw a1,4(sp)
800000a0 <bl>:
800000a0: 00054583 lbu a1,0(a0)
800000a4: 00058863 beqz a1,800000b4 <be>
800000a8: 01c000ef jal ra,800000c4 <vx_printc>
800000ac: 00150513 addi a0,a0,1
800000b0: ff1ff06f j 800000a0 <bl>
800000b4 <be>:
800000b4: 00012083 lw ra,0(sp)
800000b8: 00412583 lw a1,4(sp)
800000bc: 00c10113 addi sp,sp,12
800000c0: 00008067 ret
800000c4 <vx_printc>:
800000c4: 000102b7 lui t0,0x10
800000c8: 00b2a023 sw a1,0(t0) # 10000 <_start-0x7fff0000>
800000cc: 00008067 ret
800000d0 <vx_print_hex>:
800000d0: fe010113 addi sp,sp,-32
800000d4: 00112e23 sw ra,28(sp)
800000d8: 00812c23 sw s0,24(sp)
800000dc: 02010413 addi s0,sp,32
800000e0: fea42623 sw a0,-20(s0)
800000e4: 810007b7 lui a5,0x81000
800000e8: fec42703 lw a4,-20(s0)
800000ec: 00271713 slli a4,a4,0x2
800000f0: 08478793 addi a5,a5,132 # 81000084 <arr+0xffffff80>
800000f4: 00f707b3 add a5,a4,a5
800000f8: 0007a783 lw a5,0(a5)
800000fc: 00078513 mv a0,a5
80000100: f95ff0ef jal ra,80000094 <vx_print_str>
80000104: 00000013 nop
80000108: 01c12083 lw ra,28(sp)
8000010c: 01812403 lw s0,24(sp)
80000110: 02010113 addi sp,sp,32
80000114: 00008067 ret
80000118 <vx_printf>:
80000118: fe010113 addi sp,sp,-32
8000011c: 00112e23 sw ra,28(sp)
80000120: 00812c23 sw s0,24(sp)
80000124: 02010413 addi s0,sp,32
80000128: fea42623 sw a0,-20(s0)
8000012c: feb42423 sw a1,-24(s0)
80000130: fec42503 lw a0,-20(s0)
80000134: f61ff0ef jal ra,80000094 <vx_print_str>
80000138: fe842503 lw a0,-24(s0)
8000013c: f95ff0ef jal ra,800000d0 <vx_print_hex>
80000140: 810007b7 lui a5,0x81000
80000144: 04078513 addi a0,a5,64 # 81000040 <arr+0xffffff3c>
80000148: f4dff0ef jal ra,80000094 <vx_print_str>
8000014c: 00000013 nop
80000150: 01c12083 lw ra,28(sp)
80000154: 01812403 lw s0,24(sp)
80000158: 02010113 addi sp,sp,32
8000015c: 00008067 ret
80000160 <main>:
80000160: fe010113 addi sp,sp,-32
80000164: 00112e23 sw ra,28(sp)
80000168: 00812c23 sw s0,24(sp)
8000016c: 02010413 addi s0,sp,32
80000170: 00400513 li a0,4
80000174: ef5ff0ef jal ra,80000068 <vx_tmc>
80000178: f15ff0ef jal ra,8000008c <vx_threadID>
8000017c: fea42623 sw a0,-20(s0)
80000180: fec42703 lw a4,-20(s0)
80000184: 810007b7 lui a5,0x81000
80000188: fec42683 lw a3,-20(s0)
8000018c: 00269693 slli a3,a3,0x2
80000190: 10478793 addi a5,a5,260 # 81000104 <arr+0x0>
80000194: 00f687b3 add a5,a3,a5
80000198: 00e7a023 sw a4,0(a5)
8000019c: 00000793 li a5,0
800001a0: 00078513 mv a0,a5
800001a4: 01c12083 lw ra,28(sp)
800001a8: 01812403 lw s0,24(sp)
800001ac: 02010113 addi sp,sp,32
800001b0: 00008067 ret
Disassembly of section .rodata:
81000000 <.rodata>:
81000000: 0030 addi a2,sp,8
81000002: 0000 unimp
81000004: 0031 c.nop 12
81000006: 0000 unimp
81000008: 0032 c.slli zero,0xc
8100000a: 0000 unimp
8100000c: 00000033 add zero,zero,zero
81000010: 0034 addi a3,sp,8
81000012: 0000 unimp
81000014: 0035 c.nop 13
81000016: 0000 unimp
81000018: 0036 c.slli zero,0xd
8100001a: 0000 unimp
8100001c: 00000037 lui zero,0x0
81000020: 0038 addi a4,sp,8
81000022: 0000 unimp
81000024: 0039 c.nop 14
81000026: 0000 unimp
81000028: 0061 c.nop 24
8100002a: 0000 unimp
8100002c: 0062 c.slli zero,0x18
8100002e: 0000 unimp
81000030: 00000063 beqz zero,81000030 <main+0xfffed0>
81000034: 0064 addi s1,sp,12
81000036: 0000 unimp
81000038: 0065 c.nop 25
8100003a: 0000 unimp
8100003c: 0066 c.slli zero,0x19
8100003e: 0000 unimp
81000040: 000a c.slli zero,0x2
81000042: 0000 unimp
81000044: 0030 addi a2,sp,8
81000046: 0000 unimp
81000048: 0031 c.nop 12
8100004a: 0000 unimp
8100004c: 0032 c.slli zero,0xc
8100004e: 0000 unimp
81000050: 00000033 add zero,zero,zero
81000054: 0034 addi a3,sp,8
81000056: 0000 unimp
81000058: 0035 c.nop 13
8100005a: 0000 unimp
8100005c: 0036 c.slli zero,0xd
8100005e: 0000 unimp
81000060: 00000037 lui zero,0x0
81000064: 0038 addi a4,sp,8
81000066: 0000 unimp
81000068: 0039 c.nop 14
8100006a: 0000 unimp
8100006c: 0061 c.nop 24
8100006e: 0000 unimp
81000070: 0062 c.slli zero,0x18
81000072: 0000 unimp
81000074: 00000063 beqz zero,81000074 <main+0xffff14>
81000078: 0064 addi s1,sp,12
8100007a: 0000 unimp
8100007c: 0065 c.nop 25
8100007e: 0000 unimp
81000080: 0066 c.slli zero,0x19
Disassembly of section .data:
81000084 <hextoa>:
81000084: 0000 unimp
81000086: 8100 0x8100
81000088: 0004 0x4
8100008a: 8100 0x8100
8100008c: 0008 0x8
8100008e: 8100 0x8100
81000090: 000c 0xc
81000092: 8100 0x8100
81000094: 0010 0x10
81000096: 8100 0x8100
81000098: 0014 0x14
8100009a: 8100 0x8100
8100009c: 0018 0x18
8100009e: 8100 0x8100
810000a0: 001c 0x1c
810000a2: 8100 0x8100
810000a4: 0020 addi s0,sp,8
810000a6: 8100 0x8100
810000a8: 0024 addi s1,sp,8
810000aa: 8100 0x8100
810000ac: 0028 addi a0,sp,8
810000ae: 8100 0x8100
810000b0: 002c addi a1,sp,8
810000b2: 8100 0x8100
810000b4: 0030 addi a2,sp,8
810000b6: 8100 0x8100
810000b8: 0034 addi a3,sp,8
810000ba: 8100 0x8100
810000bc: 0038 addi a4,sp,8
810000be: 8100 0x8100
810000c0: 003c addi a5,sp,8
810000c2: 8100 0x8100
810000c4 <hextoa>:
810000c4: 0044 addi s1,sp,4
810000c6: 8100 0x8100
810000c8: 0048 addi a0,sp,4
810000ca: 8100 0x8100
810000cc: 004c addi a1,sp,4
810000ce: 8100 0x8100
810000d0: 0050 addi a2,sp,4
810000d2: 8100 0x8100
810000d4: 0054 addi a3,sp,4
810000d6: 8100 0x8100
810000d8: 0058 addi a4,sp,4
810000da: 8100 0x8100
810000dc: 005c addi a5,sp,4
810000de: 8100 0x8100
810000e0: 0060 addi s0,sp,12
810000e2: 8100 0x8100
810000e4: 0064 addi s1,sp,12
810000e6: 8100 0x8100
810000e8: 0068 addi a0,sp,12
810000ea: 8100 0x8100
810000ec: 006c addi a1,sp,12
810000ee: 8100 0x8100
810000f0: 0070 addi a2,sp,12
810000f2: 8100 0x8100
810000f4: 0074 addi a3,sp,12
810000f6: 8100 0x8100
810000f8: 0078 addi a4,sp,12
810000fa: 8100 0x8100
810000fc: 007c addi a5,sp,12
810000fe: 8100 0x8100
81000100: 0080 addi s0,sp,64
81000102: 8100 0x8100
Disassembly of section .bss:
81000104 <arr>:
...
Disassembly of section .comment:
82000000 <.comment>:
82000000: 3a434347 fmsub.d ft6,ft6,ft4,ft7,rmm
82000004: 2820 fld fs0,80(s0)
82000006: 29554e47 fmsub.s ft8,fa0,fs5,ft5,rmm
8200000a: 3820 fld fs0,112(s0)
8200000c: 322e fld ft4,232(sp)
8200000e: 302e fld ft0,232(sp)
...

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@ -0,0 +1,49 @@
:0200000480007A
:10000000130540006B000500F325000293952500C1
:10001000370600203306B6002320B600370600401E
:100020003306B600930650002320D6003706008022
:100030003306B600930670002320D6003706006012
:100040003306B600930670002320D6003706002042
:100050003306B60003270600130500006B000500F9
:100060006B10B500678000006B0005006780000022
:100070006B40B500678000006B2005006B3000000E
:10008000678000007325100267800000732500025E
:1000900067800000130141FF232011002322B100DB
:1000A0008345050063880500EF00C00113051500B6
:1000B0006FF01FFF83200100832541001301C10061
:1000C00067800000B702010023A0B2006780000033
:1000D000130101FE232E1100232C810013040102C1
:1000E0002326A4FEB70700810327C4FE13172700A9
:1000F00093874708B307F70083A707001385070016
:10010000EFF05FF9130000008320C1010324810197
:100110001301010267800000130101FE232E11006C
:10012000232C8100130401022326A4FE2324B4FE01
:100130000325C4FEEFF01FF6032584FEEFF05FF900
:10014000B707008113850704EFF0DFF41300000008
:100150008320C10103248101130101026780000093
:10016000130101FE232E1100232C81001304010230
:1001700013054000EFF05FEFEFF05FF12326A4FEE0
:100180000327C4FEB70700818326C4FE939626008A
:1001900093874710B387F60023A0E700930700007A
:1001A000138507008320C10103248101130101028B
:0401B0006780000064
:02000004810079
:10000000300000003100000032000000330000002A
:10001000340000003500000036000000370000000A
:10002000380000003900000061000000620000009C
:10003000630000006400000065000000660000002E
:100040000A00000030000000310000003200000013
:1000500033000000340000003500000036000000CE
:100060003700000038000000390000006100000087
:1000700062000000630000006400000065000000F2
:02008000660018
:100084000000008104000081080000810C00008150
:100094001000008114000081180000811C00008100
:1000A4002000008124000081280000812C000081B0
:1000B4003000008134000081380000813C00008160
:1000C40044000081480000814C0000815000008100
:1000D40054000081580000815C00008160000081B0
:1000E40064000081680000816C0000817000008160
:1000F40074000081780000817C0000818000008110
:040000058000000077
:00000001FF

31
runtime/vx_main.c Normal file
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@ -0,0 +1,31 @@
#include "intrinsics/vx_intrinsics.h"
#include "io/vx_io.h"
int arr[4];
int main()
{
// vx_print_str("Hello from runtime\n");
vx_tmc(4); // Activate 4 threads
unsigned tid = vx_threadID(); // Get TID
arr[tid] = tid;
// vx_tmc(1);
// vx_print_hex(arr[0]);
// vx_print_str("\n");
// vx_print_hex(arr[1]);
// vx_print_str("\n");
// vx_print_hex(arr[2]);
// vx_print_str("\n");
// vx_print_hex(arr[3]);
// vx_print_str("\n");
return 0;
}