github-mirrors/vortex
1
0
Fork 0
mirror of https://github.com/vortexgpgpu/vortex.git synced 2025-04-24 22:07:41 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

Merge branch 'develop' into tensor-core

Browse source
This commit is contained in:
Jaewon Lee 2024-09-30 16:48:47 -04:00 • committed by GitHub
commit 4a606061d2
No known key found for this signature in database
GPG key ID: B5690EEEBB952194
374 changed files with 16486 additions and 29573 deletions
Download patch file Download diff file Expand all files Collapse all files

44
runtime/include/vortex.h
View file

@ -34,27 +34,33 @@ typedef void* vx_buffer_h;
#define VX_CAPS_GLOBAL_MEM_SIZE 0x5
#define VX_CAPS_LOCAL_MEM_SIZE 0x6
#define VX_CAPS_ISA_FLAGS 0x7
#define VX_CAPS_TC_SIZE 0x8
#define VX_CAPS_TC_NUM 0x9
#define VX_CAPS_NUM_MEM_BANKS 0x8
#define VX_CAPS_MEM_BANK_SIZE 0x9
#define VX_CAPS_TC_SIZE 0xA
#define VX_CAPS_TC_NUM 0xB
// device isa flags
#define VX_ISA_STD_A (1ull << 0)
#define VX_ISA_STD_C (1ull << 2)
#define VX_ISA_STD_D (1ull << 3)
#define VX_ISA_STD_E (1ull << 4)
#define VX_ISA_STD_F (1ull << 5)
#define VX_ISA_STD_H (1ull << 7)
#define VX_ISA_STD_I (1ull << 8)
#define VX_ISA_STD_N (1ull << 13)
#define VX_ISA_STD_Q (1ull << 16)
#define VX_ISA_STD_S (1ull << 18)
#define VX_ISA_STD_U (1ull << 20)
#define VX_ISA_ARCH(flags) (1 << (((flags >> 30) & 0x3) + 4))
#define VX_ISA_EXT_ICACHE (1ull << 32)
#define VX_ISA_EXT_DCACHE (1ull << 33)
#define VX_ISA_EXT_L2CACHE (1ull << 34)
#define VX_ISA_EXT_L3CACHE (1ull << 35)
#define VX_ISA_EXT_LMEM (1ull << 36)
#define VX_ISA_STD_A (1ull << ISA_STD_A)
#define VX_ISA_STD_C (1ull << ISA_STD_C)
#define VX_ISA_STD_D (1ull << ISA_STD_D)
#define VX_ISA_STD_E (1ull << ISA_STD_E)
#define VX_ISA_STD_F (1ull << ISA_STD_F)
#define VX_ISA_STD_H (1ull << ISA_STD_H)
#define VX_ISA_STD_I (1ull << ISA_STD_I)
#define VX_ISA_STD_N (1ull << ISA_STD_N)
#define VX_ISA_STD_Q (1ull << ISA_STD_Q)
#define VX_ISA_STD_S (1ull << ISA_STD_S)
#define VX_ISA_STD_U (1ull << ISA_STD_U)
#define VX_ISA_ARCH(flags) (1ull << (((flags >> 30) & 0x3) + 4))
#define VX_ISA_EXT_ICACHE (1ull << (32+ISA_EXT_ICACHE))
#define VX_ISA_EXT_DCACHE (1ull << (32+ISA_EXT_DCACHE))
#define VX_ISA_EXT_L2CACHE (1ull << (32+ISA_EXT_L2CACHE))
#define VX_ISA_EXT_L3CACHE (1ull << (32+ISA_EXT_L3CACHE))
#define VX_ISA_EXT_LMEM (1ull << (32+ISA_EXT_LMEM))
#define VX_ISA_EXT_ZICOND (1ull << (32+ISA_EXT_ZICOND))
#define VX_ISA_EXT_TEX (1ull << (32+ISA_EXT_TEX))
#define VX_ISA_EXT_RASTER (1ull << (32+ISA_EXT_RASTER))
#define VX_ISA_EXT_OM (1ull << (32+ISA_EXT_OM))
// ready wait timeout
#define VX_MAX_TIMEOUT (24*60*60*1000) // 24 Hr