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tex_unit compiler fixes
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parent
8f0198149a
commit
4de75fad31
4 changed files with 11 additions and 3 deletions
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@ -80,10 +80,14 @@ module VX_execute #(
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for (genvar i = 0; i < `NUM_THREADS; ++i) begin
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assign lsu_tag_in[i][`LSUQ_ADDR_BITS-1:0] = lsu_dcache_req_if.tag[i][`LSUQ_ADDR_BITS-1:0];
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assign lsu_tag_in[i][`LSUQ_ADDR_BITS+:2] = '0;
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`ifdef DBG_CACHE_REQ_INFO
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assign lsu_tag_in[i][(`LSUQ_ADDR_BITS+2)+:`DBG_CACHE_REQ_MDATAW] = lsu_dcache_req_if.tag[i][`LSUQ_ADDR_BITS+:`DBG_CACHE_REQ_MDATAW];
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`endif
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end
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assign lsu_dcache_rsp_if.tag[`LSUQ_ADDR_BITS-1:0] = lsu_tag_out[`LSUQ_ADDR_BITS-1:0];
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`ifdef DBG_CACHE_REQ_INFO
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assign lsu_dcache_rsp_if.tag[`LSUQ_ADDR_BITS+:`DBG_CACHE_REQ_MDATAW] = lsu_tag_out[(`LSUQ_ADDR_BITS+2)+:`DBG_CACHE_REQ_MDATAW];
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`endif
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`UNUSED_VAR (lsu_tag_out)
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VX_tex_lsu_arb #(
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@ -9,7 +9,7 @@
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`define FIXED_HALF (`FIXED_ONE >> 1)
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`define FIXED_MASK (`FIXED_ONE - 1)
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`define CLAMP(x,lo,hi) ((x < lo) ? lo : ((x > hi) ? hi : x))
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`define CLAMP(x,lo,hi) (($signed(x) < $signed(lo)) ? lo : ((x > hi) ? hi : x))
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`define BLEND_FRAC_64 8
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@ -179,7 +179,9 @@ module VX_tex_memory #(
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`ifdef DBG_CACHE_REQ_INFO
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assign dcache_req_if.tag = {`NUM_THREADS{q_req_PC, q_req_wid, texel_idx, q_ib_waddr}};
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`else
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assign dcache_req_if.tag = {`NUM_THREADS{q_ib_waddr}};
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assign dcache_req_if.tag = {`NUM_THREADS{texel_idx, q_ib_waddr}};
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`UNUSED_VAR (q_req_wid)
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`UNUSED_VAR (q_req_PC)
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`endif
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// Dcache Response
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@ -215,7 +217,7 @@ module VX_tex_memory #(
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assign mbuf_raddr = dcache_rsp_if.tag[`LSUQ_ADDR_BITS-1:0];
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assign rsp_texel_idx = dcache_rsp_if.tag[`LSUQ_ADDR_BITS-1+:2];
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assign rsp_texel_idx = dcache_rsp_if.tag[`LSUQ_ADDR_BITS+:2];
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assign rsp_is_dup = ib_dup_reqs[rsp_texel_idx];
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@ -14,6 +14,8 @@ module VX_tex_wrap #(
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wire [31:0] clamp = `CLAMP(coord_i, 0, `FIXED_MASK);
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`UNUSED_VAR (clamp)
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always @(*) begin
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case (wrap_i)
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`TEX_WRAP_CLAMP:
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