Partial cleaning p1 64b_ext

hw/rtl/VX_gpu_types.vh

@@ -41,7 +41,7 @@ typedef struct packed {
 
 // Word size in bytes
 localparam ICACHE_WORD_SIZE	    = 4;
-localparam ICACHE_ADDR_WIDTH	= (32 - `CLOG2(ICACHE_WORD_SIZE));
+localparam ICACHE_ADDR_WIDTH	= (`XLEN - `CLOG2(ICACHE_WORD_SIZE));
 
 // Block size in bytes
 localparam ICACHE_LINE_SIZE	    = `L1_LINE_SIZE;
@@ -69,8 +69,8 @@ localparam ICACHE_MEM_TAG_WIDTH = `CACHE_CLUSTER_BYPASS_TAG_WIDTH(ICACHE_NUM_REQ
 ////////////////////////// Dcache Parameters //////////////////////////////////
 
 // Word size in bytes
-localparam DCACHE_WORD_SIZE	    = 4;
-localparam DCACHE_ADDR_WIDTH	= (32 - `CLOG2(DCACHE_WORD_SIZE));
+localparam DCACHE_WORD_SIZE	    = 8;
+localparam DCACHE_ADDR_WIDTH	= (`XLEN - `CLOG2(DCACHE_WORD_SIZE));
 
 // Block size in bytes
 localparam DCACHE_LINE_SIZE 	= `L1_LINE_SIZE;

hw/rtl/cache/VX_cache_arb.sv

@@ -27,7 +27,7 @@ module VX_cache_arb #(
     VX_cache_rsp_if.slave   rsp_out_if [NUM_OUTPUTS]
 );     
 
-    localparam ADDR_WIDTH    = (32-`CLOG2(DATA_SIZE));
+    localparam ADDR_WIDTH    = (`XLEN-`CLOG2(DATA_SIZE));
     localparam DATA_WIDTH    = (8 * DATA_SIZE);
     localparam LOG_NUM_REQS  = `ARB_SEL_BITS(NUM_INPUTS, NUM_OUTPUTS);
     localparam NUM_REQS      = 1 << LOG_NUM_REQS;

hw/rtl/cache/VX_cache_define.vh

@@ -55,8 +55,8 @@
 
 `define MEM_TAG_TO_BANK_ID(x)   x[MSHR_ADDR_WIDTH +: `BANK_SEL_BITS]
 
-`define LINE_TO_BYTE_ADDR(x, i) {x, (32-$bits(x))'(i << (32-$bits(x)-`BANK_SEL_BITS))}
+`define LINE_TO_BYTE_ADDR(x, i) {x, (`XLEN-$bits(x))'(i << (`XLEN-$bits(x)-`BANK_SEL_BITS))}
 
-`define TO_FULL_ADDR(x)         {x, (32-$bits(x))'(0)}
+`define TO_FULL_ADDR(x)         {x, (`XLEN-$bits(x))'(0)}
 
 `endif // VX_CACHE_DEFINE_VH

hw/rtl/cache/VX_cache_req_if.sv

@@ -1,10 +1,11 @@
 `include "VX_cache_define.vh"
+`include "VX_config.vh"
 
 interface VX_cache_req_if #(
     parameter NUM_REQS   = 1,
     parameter WORD_SIZE  = 1,
     parameter TAG_WIDTH  = 1,    
-    parameter ADDR_WIDTH = 32 - `CLOG2(WORD_SIZE),
+    parameter ADDR_WIDTH = `XLEN - `CLOG2(WORD_SIZE),
     parameter DATA_WIDTH = WORD_SIZE * 8
 ) ();
 

hw/rtl/cache/VX_smem_switch.sv

@@ -25,7 +25,7 @@ module VX_smem_switch #(
     // output response
     VX_cache_rsp_if.slave   rsp_out_if [NUM_REQS]    
 );  
-    localparam ADDR_WIDTH    = (32-`CLOG2(DATA_SIZE));
+    localparam ADDR_WIDTH    = (`XLEN-`CLOG2(DATA_SIZE));
     localparam DATA_WIDTH    = (8 * DATA_SIZE);
     localparam LOG_NUM_REQS  = `CLOG2(NUM_REQS);
     localparam TAG_OUT_WIDTH = TAG_WIDTH - LOG_NUM_REQS;

hw/rtl/core/VX_alu_unit.sv

@@ -19,16 +19,16 @@ module VX_alu_unit #(
 
     localparam UUID_WIDTH     = `UP(`UUID_BITS);
     localparam NW_WIDTH       = `UP(`NW_BITS);
-    localparam RSP_ARB_DATAW  = UUID_WIDTH + NW_WIDTH + `NUM_THREADS + 32 + `NR_BITS + 1 + `NUM_THREADS * 32;
+    localparam RSP_ARB_DATAW  = UUID_WIDTH + NW_WIDTH + `NUM_THREADS + 32 + `NR_BITS + 1 + `NUM_THREADS * `XLEN;
     localparam RSP_ARB_SIZE   = 1 + `EXT_M_ENABLED;
     localparam SHIFT_IMM_BITS = `CLOG2(`XLEN) - 1;
 
 
-    reg [`NUM_THREADS-1:0][31:0] alu_result;
-    reg [`NUM_THREADS-1:0][31:0] add_result;
-    reg [`NUM_THREADS-1:0][32:0] sub_result; // 33 or 65 bits to keep the overflow bit for branch calculations
-    reg [`NUM_THREADS-1:0][31:0] shr_result;
-    reg [`NUM_THREADS-1:0][31:0] msc_result;
+    reg [`NUM_THREADS-1:0][`XLEN-1:0] alu_result;
+    reg [`NUM_THREADS-1:0][`XLEN-1:0] add_result;
+    reg [`NUM_THREADS-1:0][`XLEN:0] sub_result; // 33 or 65 bits to keep the overflow bit for branch calculations
+    reg [`NUM_THREADS-1:0][`XLEN-1:0] shr_result;
+    reg [`NUM_THREADS-1:0][`XLEN-1:0] msc_result;
 
     wire ready_in;    
 
@@ -155,7 +155,7 @@ module VX_alu_unit #(
     end
 
     wire [`INST_BR_BITS-1:0] br_op_r;
-    wire [31:0] br_dest_r;
+    wire [`XLEN-1:0] br_dest_r;
     wire is_less_r;
     wire is_equal_r;
     wire is_br_op_r;
@@ -181,7 +181,7 @@ module VX_alu_unit #(
     assign branch_ctl_if.valid = alu_valid_out && alu_ready_out && is_br_op_r;
     assign branch_ctl_if.taken = ((br_less ? is_less_r : is_equal_r) ^ br_neg) | br_static;
     assign branch_ctl_if.wid   = alu_wid;
-    assign branch_ctl_if.dest  = br_dest_r[31:0];
+    assign branch_ctl_if.dest  = br_dest_r[`XLEN-1:0];
 
 `ifdef EXT_M_ENABLE
 

hw/rtl/core/VX_commit.sv

@@ -1,4 +1,5 @@
 `include "VX_define.vh"
+`include "VX_config.vh"
 
 module VX_commit #(
     parameter CORE_ID = 0
@@ -22,7 +23,7 @@ module VX_commit #(
     VX_cmt_to_fetch_if.master cmt_to_fetch_if,
 
     // simulation helper signals
-    output wire [`NUM_REGS-1:0][31:0] sim_wb_value
+    output wire [`NUM_REGS-1:0][`XLEN-1:0] sim_wb_value
 );
     localparam NUM_RSPS = `NUM_EX_UNITS;
     localparam COMMIT_SIZEW = $clog2(NUM_RSPS * `NUM_THREADS + 1);

hw/rtl/core/VX_core.sv

@@ -77,7 +77,7 @@ module VX_core #(
 
     // simulation helper signals
     output wire             sim_ebreak,
-    output wire [`NUM_REGS-1:0][31:0] sim_wb_value,
+    output wire [`NUM_REGS-1:0][`XLEN-1:0] sim_wb_value,
 
     // Status
     output wire             busy

hw/rtl/core/VX_dispatch.sv

@@ -76,7 +76,7 @@ module VX_dispatch (
     end
 
     VX_skid_buffer #(
-        .DATAW   (UUID_WIDTH + NW_WIDTH + `NUM_THREADS + 32 + `INST_LSU_BITS + 1 + 32 + `NR_BITS + 1 + `NUM_THREADS*32 + `NUM_THREADS*`XLEN),
+        .DATAW   (UUID_WIDTH + NW_WIDTH + `NUM_THREADS + 32 + `INST_LSU_BITS + 1 + `XLEN + `NR_BITS + 1 + `NUM_THREADS*`XLEN + `NUM_THREADS*`XLEN),
         .OUT_REG (1)
     ) lsu_buffer (
         .clk       (clk),
@@ -143,7 +143,7 @@ module VX_dispatch (
     wire [`INST_GPU_BITS-1:0] gpu_op_type = `INST_GPU_BITS'(dispatch_if.op_type);
 
     VX_skid_buffer #(
-        .DATAW   (UUID_WIDTH + NW_WIDTH + `NUM_THREADS + 32 + 32 + `INST_GPU_BITS + `INST_MOD_BITS + `NR_BITS + 1 + `UP(`NT_BITS)  + (3 * `NUM_THREADS * 32)),
+        .DATAW   (UUID_WIDTH + NW_WIDTH + `NUM_THREADS + 32 + 32 + `INST_GPU_BITS + `INST_MOD_BITS + `NR_BITS + 1 + `UP(`NT_BITS)  + (3 * `NUM_THREADS * `XLEN)),
         .OUT_REG (1)
     ) gpu_buffer (
         .clk       (clk),

hw/rtl/core/VX_lsu_unit.sv

@@ -43,7 +43,7 @@ module VX_lsu_unit #(
 `endif
 
     //                     uuid,        addr_type,                               wid,       PC,  tmask,         rd,        op_type,         align,                        is_dup
-    localparam TAG_WIDTH = UUID_WIDTH + (`NUM_THREADS * `CACHE_ADDR_TYPE_BITS) + NW_WIDTH + 32 + `NUM_THREADS + `NR_BITS + `INST_LSU_BITS + (`NUM_THREADS * REQ_ASHIFT) + 1;
+    localparam TAG_WIDTH = UUID_WIDTH + (`NUM_THREADS * `CACHE_ADDR_TYPE_BITS) + NW_WIDTH + 32 + `NUM_THREADS + `NR_BITS + `INST_LSU_BITS + (`NUM_THREADS * (REQ_ASHIFT)) + 1;
 
     `STATIC_ASSERT(0 == (`IO_BASE_ADDR % MEM_ASHIFT), ("invalid parameter"))
     `STATIC_ASSERT(0 == (`STACK_BASE_ADDR % MEM_ASHIFT), ("invalid parameter"))    
@@ -170,14 +170,14 @@ module VX_lsu_unit #(
         always @(*) begin
             mem_req_data[i] = lsu_req_if.store_data[i];
             case (req_align[i])
-                1: mem_req_data[`XLEN-1:8]  = lsu_req_if.store_data[i][`XLEN-9:0];
-                2: mem_req_data[`XLEN-1:16] = lsu_req_if.store_data[i][`XLEN-17:0];
-                3: mem_req_data[`XLEN-1:24] = lsu_req_if.store_data[i][`XLEN-25:0];
+                1: mem_req_data[i][`XLEN-1:8]  = lsu_req_if.store_data[i][`XLEN-9:0];
+                2: mem_req_data[i][`XLEN-1:16] = lsu_req_if.store_data[i][`XLEN-17:0];
+                3: mem_req_data[i][`XLEN-1:24] = lsu_req_if.store_data[i][`XLEN-25:0];
                 `ifdef MODE_64_BIT
-                4: mem_req_data[`XLEN-1:32] = lsu_req_if.store_data[i][`XLEN-33:0];
-                5: mem_req_data[`XLEN-1:40] = lsu_req_if.store_data[i][`XLEN-41:0];
-                6: mem_req_data[`XLEN-1:48] = lsu_req_if.store_data[i][`XLEN-49:0];
-                7: mem_req_data[`XLEN-1:56] = lsu_req_if.store_data[i][`XLEN-57:0];
+                4: mem_req_data[i][`XLEN-1:32] = lsu_req_if.store_data[i][`XLEN-33:0];
+                5: mem_req_data[i][`XLEN-1:40] = lsu_req_if.store_data[i][`XLEN-41:0];
+                6: mem_req_data[i][`XLEN-1:48] = lsu_req_if.store_data[i][`XLEN-49:0];
+                7: mem_req_data[i][`XLEN-1:56] = lsu_req_if.store_data[i][`XLEN-57:0];
                 `endif
                 default:;
             endcase
@@ -205,7 +205,7 @@ module VX_lsu_unit #(
         .NUM_REQS    (LSU_MEM_REQS), 
         .NUM_BANKS   (DCACHE_NUM_REQS),
         .ADDR_WIDTH  (DCACHE_ADDR_WIDTH),
-        .DATA_WIDTH  (32),
+        .DATA_WIDTH  (`XLEN),
         .QUEUE_SIZE  (`LSUQ_SIZE),
         .TAG_WIDTH   (TAG_WIDTH),
         .MEM_TAG_ID  (UUID_WIDTH + (`NUM_THREADS * `CACHE_ADDR_TYPE_BITS)),
@@ -338,7 +338,7 @@ module VX_lsu_unit #(
 
     // load response formatting
 
-    reg [`NUM_THREADS-1:0][31:0] rsp_data;
+    reg [`NUM_THREADS-1:0][`XLEN-1:0] rsp_data;
     wire [`NUM_THREADS-1:0] rsp_tmask;
 
     for (genvar i = 0; i < `NUM_THREADS; i++) begin     // TODO: HOW TF DO I DO THE MEMORY response???

hw/rtl/core/VX_warp_sched.sv

@@ -40,7 +40,7 @@ module VX_warp_sched #(
     reg [`NUM_WARPS-1:0] stalled_warps;  // asserted when a branch/gpgpu instructions are issued
     
     reg [`NUM_WARPS-1:0][`NUM_THREADS-1:0] thread_masks;
-    reg [`NUM_WARPS-1:0][31:0] warp_pcs;
+    reg [`NUM_WARPS-1:0][`XLEN-1:0] warp_pcs;
 
     // barriers
     reg [`NUM_BARRIERS-1:0][`NUM_WARPS-1:0] barrier_masks; // warps waiting on barrier

hw/rtl/interfaces/VX_branch_ctl_if.sv

@@ -5,7 +5,7 @@ interface VX_branch_ctl_if ();
     wire                    valid;    
     wire [`UP(`NW_BITS)-1:0] wid;    
     wire                    taken;
-    wire [`XLEN-1:0]             dest;
+    wire [`XLEN-1:0]        dest;
 
     modport master (
         output valid,    

hw/rtl/interfaces/VX_csr_req_if.sv

@@ -10,7 +10,7 @@ interface VX_csr_req_if ();
     wire [`INST_CSR_BITS-1:0]   op_type;
     wire [`CSR_ADDR_BITS-1:0]   addr;
     wire [`UP(`NT_BITS)-1:0]    tid;
-    wire [`NUM_THREADS-1:0][31:0] rs1_data;    
+    wire [`NUM_THREADS-1:0][`XLEN-1:0] rs1_data;    
     wire                        use_imm;
     wire [`NRI_BITS-1:0]        imm;
     wire [`NR_BITS-1:0]         rd;

hw/rtl/interfaces/VX_dispatch_if.sv

@@ -13,7 +13,7 @@ interface VX_dispatch_if ();
     wire                        wb;
     wire                        use_PC;
     wire                        use_imm;
-    wire [31:0]                 imm;
+    wire [`XLEN-1:0]            imm;
     wire [`NR_BITS-1:0]         rd;
 
     wire                        ready;

hw/rtl/interfaces/VX_mem_req_if.sv

@@ -1,9 +1,10 @@
 `include "VX_define.vh"
+`include "VX_config.vh"
 
 interface VX_mem_req_if #(
     parameter DATA_WIDTH = 1,
     parameter DATA_SIZE  = DATA_WIDTH / 8,
-    parameter ADDR_WIDTH = 32 - `CLOG2(DATA_SIZE),
+    parameter ADDR_WIDTH = `XLEN - `CLOG2(DATA_SIZE),
     parameter TAG_WIDTH  = 1    
 ) ();