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minor update

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Blaise Tine 2024-08-04 14:16:08 -07:00
parent 029609b3fd
commit 59108525e1
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hw/syn/altera/quartus/project.sdc
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create_clock -name {clk} -period "220 MHz" -waveform { 0.000 1.0 } [get_ports {clk}]
create_clock -name {clk} -period "200 MHz" -waveform { 0.000 1.0 } [get_ports {clk}]