minor update

This commit is contained in:
Blaise Tine 2024-08-26 23:45:00 -07:00
parent 6d5e71a062
commit 5adfd5ec68
6 changed files with 6 additions and 6 deletions

View file

@ -184,7 +184,7 @@ module VX_socket import VX_gpu_pkg::*; #(
.DATA_SIZE (`L1_LINE_SIZE),
.TAG_WIDTH (L1_MEM_TAG_WIDTH),
.TAG_SEL_IDX (0),
.ARBITER ("R"),
.ARBITER ("P"), // prioritize the icache
.REQ_OUT_BUF (3),
.RSP_OUT_BUF (3)
) mem_arb (

View file

@ -324,7 +324,7 @@ module VX_alu_muldiv #(
VX_stream_arb #(
.NUM_INPUTS (2),
.DATAW (TAG_WIDTH + (NUM_LANES * `XLEN)),
.ARBITER ("R"),
.ARBITER ("P"),
.OUT_BUF (1)
) rsp_buf (
.clk (clk),

View file

@ -50,7 +50,7 @@ module VX_mem_unit import VX_gpu_pkg::*; #(
.REQ0_OUT_BUF (3),
.REQ1_OUT_BUF (0),
.RSP_OUT_BUF (1),
.ARBITER ("R")
.ARBITER ("P")
) lmem_switch (
.clk (clk),
.reset (reset),

View file

@ -430,7 +430,7 @@ module VX_fpu_dpi import VX_fpu_pkg::*; #(
VX_stream_arb #(
.NUM_INPUTS (2),
.DATAW (RSP_DATAW),
.ARBITER ("R"),
.ARBITER ("P"),
.OUT_BUF (0)
) div_sqrt_arb (
.clk (clk),

View file

@ -243,7 +243,7 @@ module VX_fpu_dsp import VX_fpu_pkg::*; #(
VX_stream_arb #(
.NUM_INPUTS (2),
.DATAW (RSP_DATAW),
.ARBITER ("R"),
.ARBITER ("P"),
.OUT_BUF (0)
) div_sqrt_arb (
.clk (clk),

View file

@ -43,7 +43,7 @@ module VX_priority_encoder #(
end else if (N == 2) begin
assign onehot_out = {~reversed[0], reversed[0]};
assign onehot_out = {reversed[1] && ~reversed[0], reversed[0]};
assign index_out = ~reversed[0];
assign valid_out = (| reversed);