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Added case for vector-test due to different exitcode

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The vector tests need the cluster exitcodes
This commit is contained in:
MichaelJSr 2024-11-27 23:50:57 -08:00
parent 073e0ddd10
commit 5eecd0e987
5 changed files with 20 additions and 9 deletions
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9
sim/simx/main.cpp
View file

@ -29,13 +29,14 @@
using namespace vortex;
static void show_usage() {
std::cout << "Usage: [-c <cores>] [-w <warps>] [-t <threads>] [-s: stats] [-h: help] <program>" << std::endl;
std::cout << "Usage: [-c <cores>] [-w <warps>] [-t <threads>] [-v: vector-test] [-s: stats] [-h: help] <program>" << std::endl;
}
uint32_t num_threads = NUM_THREADS;
uint32_t num_warps = NUM_WARPS;
uint32_t num_cores = NUM_CORES;
bool showStats = false;
bool vector_test = false;
const char* program = nullptr;
static void parse_args(int argc, char **argv) {
@ -51,6 +52,9 @@ static void parse_args(int argc, char **argv) {
case 'c':
num_cores = atoi(optarg);
break;
case 'v':
vector_test = true;
break;
case 's':
showStats = true;
break;
@ -115,6 +119,9 @@ int main(int argc, char **argv) {
std::cout << "[VXDRV] START: program=" << program << std::endl;
#endif
// run simulation
// vector test exitcode is a special case
if (vector_test) return processor.run();
// else continue as normal
processor.run();
// read exitcode from @MPM.1

10
sim/simx/processor.cpp
View file

@ -107,11 +107,12 @@ void ProcessorImpl::set_satp(uint64_t satp) {
}
#endif
void ProcessorImpl::run() {
int ProcessorImpl::run() {
SimPlatform::instance().reset();
this->reset();
bool done;
int exitcode = 0;
do {
SimPlatform::instance().tick();
done = true;
@ -120,9 +121,12 @@ void ProcessorImpl::run() {
done = false;
continue;
}
exitcode |= cluster->get_exitcode();
}
perf_mem_latency_ += perf_mem_pending_reads_;
} while (!done);
return exitcode;
}
void ProcessorImpl::reset() {
@ -168,8 +172,8 @@ void Processor::attach_ram(RAM* mem) {
impl_->attach_ram(mem);
}
void Processor::run() {
impl_->run();
int Processor::run() {
return impl_->run();
}
void Processor::dcr_write(uint32_t addr, uint32_t value) {

2
sim/simx/processor.h
View file

@ -33,7 +33,7 @@ public:
void attach_ram(RAM* mem);
void run();
int run();
void dcr_write(uint32_t addr, uint32_t value);
#ifdef VM_ENABLE

2
sim/simx/processor_impl.h
View file

@ -36,7 +36,7 @@ public:
void attach_ram(RAM* mem);
void run();
int run();
void dcr_write(uint32_t addr, uint32_t value);

6
tests/riscv/riscv-vector-tests/run-test.sh.in
View file

@ -93,8 +93,8 @@ for testcase in ${testcases[@]}; do
ln -s "$f" "$f.elf";
"$RISCV_TOOLCHAIN_PATH"/bin/riscv"$XLEN"-unknown-elf-objdump -D "$f.elf" > "$f.dump";
"$RISCV_TOOLCHAIN_PATH"/bin/riscv"$XLEN"-unknown-elf-objcopy -O binary "$f.elf" "$f.bin";
$SCRIPT_DIR/../../../sim/simx/simx -c 1 "$f.bin" &> "$f.log";
if [ $? -eq 13 ]; then
$SCRIPT_DIR/../../../sim/simx/simx -v -c 1 "$f.bin" &> "$f.log";
if [ $? -eq 1 ]; then
echo "$f PASSED"
let "passed++"
else
@ -103,7 +103,7 @@ for testcase in ${testcases[@]}; do
fi
# REG_TESTS=1 informs the script to delete the previous binary after each vector test to save disk space
# Otherwise, the vector regression tests would run out of disk space eventually
if [ $REG_TESTS -eq 1 ]; then
if [ -n "$REG_TESTS" ] && [ $REG_TESTS -eq 1 ]; then
cat $f.log
rm $f.*
rm $f