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https://github.com/vortexgpgpu/vortex.git
synced 2025-04-23 13:27:29 -04:00
minor update - registering execute units skid buffers
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parent
f27c1fac5f
commit
6739dc7923
2 changed files with 85 additions and 7 deletions
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@ -38,8 +38,7 @@ module VX_instr_demux (
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VX_skid_buffer #(
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.DATAW (`NW_BITS + `NUM_THREADS + 32 + 32 + `ALU_BR_BITS + 1 + 32 + 1 + 1 + `NR_BITS + 1 + `NT_BITS + (2 * `NUM_THREADS * 32)),
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.NOBACKPRESSURE (1), // ALU has no back pressure,
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.BUFFERED (0)
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.NOBACKPRESSURE (1) // ALU has no back pressure
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) alu_buffer (
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.clk (clk),
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.reset (reset),
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@ -58,7 +57,7 @@ module VX_instr_demux (
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VX_skid_buffer #(
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.DATAW (`NW_BITS + `NUM_THREADS + 32 + `LSU_BITS + 32 + `NR_BITS + 1 + (2 * `NUM_THREADS * 32)),
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.BUFFERED (0)
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.BUFFERED (1)
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) lsu_buffer (
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.clk (clk),
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.reset (reset),
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@ -77,7 +76,7 @@ module VX_instr_demux (
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VX_skid_buffer #(
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.DATAW (`NW_BITS + `NUM_THREADS + 32 + `CSR_BITS + `CSR_ADDR_BITS + `NR_BITS + 1 + 1 + `NR_BITS + 32),
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.BUFFERED (0)
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.BUFFERED (1)
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) csr_buffer (
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.clk (clk),
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.reset (reset),
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@ -97,7 +96,7 @@ module VX_instr_demux (
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VX_skid_buffer #(
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.DATAW (`NW_BITS + `NUM_THREADS + 32 + `MUL_BITS + `NR_BITS + 1 + (2 * `NUM_THREADS * 32)),
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.BUFFERED (0)
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.BUFFERED (1)
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) mul_buffer (
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.clk (clk),
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.reset (reset),
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@ -118,7 +117,7 @@ module VX_instr_demux (
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VX_skid_buffer #(
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.DATAW (`NW_BITS + `NUM_THREADS + 32 + `FPU_BITS + `MOD_BITS + `NR_BITS + 1 + (3 * `NUM_THREADS * 32)),
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.BUFFERED (0)
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.BUFFERED (1)
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) fpu_buffer (
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.clk (clk),
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.reset (reset),
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@ -140,7 +139,7 @@ module VX_instr_demux (
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VX_skid_buffer #(
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.DATAW (`NW_BITS + `NUM_THREADS + 32 + 32 + `GPU_BITS + `NR_BITS + 1 + (`NUM_THREADS * 32 + 32)),
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.BUFFERED (0)
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.BUFFERED (1)
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) gpu_buffer (
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.clk (clk),
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.reset (reset),
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79
hw/syn/quartus/top4/Makefile
Normal file
79
hw/syn/quartus/top4/Makefile
Normal file
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@ -0,0 +1,79 @@
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FAMILY = "Arria 10"
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DEVICE = 10AX115N3F40E2SG
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FPU_CORE_PATH=../../../rtl/fp_cores/altera/arria10
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#FAMILY = "Stratix 10"
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#DEVICE = 1SX280HN2F43E2VG
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#FPU_CORE_PATH=../../../rtl/fp_cores/altera/stratix10
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PROJECT = vortex_afu
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TOP_LEVEL_ENTITY = vortex_afu
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SRC_FILE = vortex_afu.sv
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RTL_DIR=../../../rtl
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FPU_INCLUDE = $(RTL_DIR)/fp_cores;$(FPU_CORE_PATH);$(RTL_DIR)/fp_cores/fpnew/src;$(RTL_DIR)/fp_cores/fpnew/src/fpu_div_sqrt_mvp/hdl;$(RTL_DIR)/fp_cores/fpnew/src/common_cells/include;$(RTL_DIR)/fp_cores/fpnew/src/common_cells/src
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RTL_INCLUDE = $(RTL_DIR);$(RTL_DIR)/libs;$(RTL_DIR)/interfaces;$(RTL_DIR)/cache;../../../rtl/afu;../../../rtl/afu/ccip;$(FPU_INCLUDE)
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PROJECT_FILES = $(PROJECT).qpf $(PROJECT).qsf
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# Executable Configuration
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SYN_ARGS = --parallel --read_settings_files=on
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FIT_ARGS = --parallel --part=$(DEVICE) --read_settings_files=on
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ASM_ARGS =
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STA_ARGS = --parallel --do_report_timing
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# Build targets
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all: $(PROJECT).sta.rpt
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syn: $(PROJECT).syn.rpt
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fit: $(PROJECT).fit.rpt
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asm: $(PROJECT).asm.rpt
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sta: $(PROJECT).sta.rpt
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smart: smart.log
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# Target implementations
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STAMP = echo done >
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$(PROJECT).syn.rpt: smart.log syn.chg $(SOURCE_FILES)
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quartus_syn $(PROJECT) $(SYN_ARGS)
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$(STAMP) fit.chg
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$(PROJECT).fit.rpt: smart.log fit.chg $(PROJECT).syn.rpt
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quartus_fit $(PROJECT) $(FIT_ARGS)
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$(STAMP) asm.chg
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$(STAMP) sta.chg
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$(PROJECT).asm.rpt: smart.log asm.chg $(PROJECT).fit.rpt
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quartus_asm $(PROJECT) $(ASM_ARGS)
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$(PROJECT).sta.rpt: smart.log sta.chg $(PROJECT).fit.rpt
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quartus_sta $(PROJECT) $(STA_ARGS)
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smart.log: $(PROJECT_FILES)
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quartus_sh --determine_smart_action $(PROJECT) > smart.log
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# Project initialization
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$(PROJECT_FILES):
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quartus_sh -t ../project.tcl -project $(PROJECT) -family $(FAMILY) -device $(DEVICE) -top $(TOP_LEVEL_ENTITY) -src "$(SRC_FILE)" -sdc ../project.sdc -inc "$(RTL_INCLUDE)" -set "NOPAE" -set "NUM_CORES=4"
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syn.chg:
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$(STAMP) syn.chg
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fit.chg:
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$(STAMP) fit.chg
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sta.chg:
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$(STAMP) sta.chg
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asm.chg:
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$(STAMP) asm.chg
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program: $(PROJECT).sof
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quartus_pgm --no_banner --mode=jtag -o "$(PROJECT).sof"
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clean:
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rm -rf bin *.rpt *.chg *.qsf *.qpf *.qws *.log *.htm *.eqn *.pin *.sof *.pof qdb incremental_db tmp-clearbox
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