mirror of
https://github.com/vortexgpgpu/vortex.git
synced 2025-04-23 21:39:10 -04:00
32-bit/64-bit address space compatibility
This commit is contained in:
parent
364136d66f
commit
68d2ac6f5e
18 changed files with 87 additions and 70 deletions
|
@ -146,61 +146,71 @@
|
|||
|
||||
`ifdef XLEN_64
|
||||
|
||||
`ifndef STARTUP_ADDR
|
||||
`define STARTUP_ADDR 64'h180000000
|
||||
`ifndef STACK_BASE_ADDR
|
||||
`define STACK_BASE_ADDR 64'h1FFFF0000
|
||||
`endif
|
||||
|
||||
`ifndef STACK_BASE_ADDR
|
||||
`define STACK_BASE_ADDR 64'h1FF000000
|
||||
`ifndef STARTUP_ADDR
|
||||
`define STARTUP_ADDR 64'h080000000
|
||||
`endif
|
||||
|
||||
`ifndef USER_BASE_ADDR
|
||||
`define USER_BASE_ADDR 64'h000010000
|
||||
`endif
|
||||
|
||||
`ifndef IO_BASE_ADDR
|
||||
`define IO_BASE_ADDR 64'h1FFF00000
|
||||
`define IO_BASE_ADDR 64'h000000040
|
||||
`endif
|
||||
|
||||
`else
|
||||
|
||||
`ifndef STARTUP_ADDR
|
||||
`define STARTUP_ADDR 32'h80000000
|
||||
`ifndef STACK_BASE_ADDR
|
||||
`define STACK_BASE_ADDR 32'hFFFF0000
|
||||
`endif
|
||||
|
||||
`ifndef STACK_BASE_ADDR
|
||||
`define STACK_BASE_ADDR 32'hFF000000
|
||||
`ifndef STARTUP_ADDR
|
||||
`define STARTUP_ADDR 32'h80000000
|
||||
`endif
|
||||
|
||||
`ifndef USER_BASE_ADDR
|
||||
`define USER_BASE_ADDR 32'h00010000
|
||||
`endif
|
||||
|
||||
`ifndef IO_BASE_ADDR
|
||||
`define IO_BASE_ADDR 32'hFFF00000
|
||||
`define IO_BASE_ADDR 32'h00000040
|
||||
`endif
|
||||
|
||||
`endif
|
||||
|
||||
`ifndef LMEM_BASE_ADDR
|
||||
`define LMEM_BASE_ADDR `STACK_BASE_ADDR
|
||||
`endif
|
||||
`define IO_END_ADDR `USER_BASE_ADDR
|
||||
|
||||
`ifndef LMEM_LOG_SIZE
|
||||
`define LMEM_LOG_SIZE 14
|
||||
`endif
|
||||
|
||||
`ifndef IO_COUT_ADDR
|
||||
`define IO_COUT_ADDR `IO_BASE_ADDR
|
||||
`ifndef LMEM_BASE_ADDR
|
||||
`define LMEM_BASE_ADDR `STACK_BASE_ADDR
|
||||
`endif
|
||||
`define IO_COUT_SIZE `MEM_BLOCK_SIZE
|
||||
|
||||
`ifndef IO_COUT_ADDR
|
||||
`define IO_COUT_ADDR `IO_BASE_ADDR
|
||||
`endif
|
||||
`define IO_COUT_SIZE `MEM_BLOCK_SIZE
|
||||
|
||||
`ifndef IO_MPM_ADDR
|
||||
`define IO_MPM_ADDR (`IO_COUT_ADDR + `IO_COUT_SIZE)
|
||||
`define IO_MPM_ADDR (`IO_COUT_ADDR + `IO_COUT_SIZE)
|
||||
`endif
|
||||
`define IO_MPM_SIZE (4 * 64 * `NUM_CORES * `NUM_CLUSTERS)
|
||||
`define IO_MPM_SIZE (8 * 32 * `NUM_CORES * `NUM_CLUSTERS)
|
||||
|
||||
`ifndef STACK_LOG2_SIZE
|
||||
`define STACK_LOG2_SIZE 13
|
||||
`endif
|
||||
`define STACK_SIZE (1 << `STACK_LOG2_SIZE)
|
||||
`define STACK_SIZE (1 << `STACK_LOG2_SIZE)
|
||||
|
||||
`define RESET_DELAY 8
|
||||
|
||||
`ifndef STALL_TIMEOUT
|
||||
`define STALL_TIMEOUT (100000 * (1 ** (`L2_ENABLED + `L3_ENABLED)))
|
||||
`define STALL_TIMEOUT (100000 * (1 ** (`L2_ENABLED + `L3_ENABLED)))
|
||||
`endif
|
||||
|
||||
`ifndef SV_DPI
|
||||
|
|
|
@ -71,8 +71,9 @@ module VX_lsu_slice import VX_gpu_pkg::*; #(
|
|||
wire [MEM_ADDRW-1:0] block_addr = full_addr[i][MEM_ASHIFT +: MEM_ADDRW];
|
||||
// is I/O address
|
||||
wire [MEM_ADDRW-1:0] io_addr_start = MEM_ADDRW'(`XLEN'(`IO_BASE_ADDR) >> MEM_ASHIFT);
|
||||
wire [MEM_ADDRW-1:0] io_addr_end = MEM_ADDRW'(`XLEN'(`IO_END_ADDR) >> MEM_ASHIFT);
|
||||
assign mem_req_atype[i][`ADDR_TYPE_FLUSH] = req_is_fence;
|
||||
assign mem_req_atype[i][`ADDR_TYPE_IO] = (block_addr >= io_addr_start);
|
||||
assign mem_req_atype[i][`ADDR_TYPE_IO] = (block_addr >= io_addr_start) && (block_addr < io_addr_end);
|
||||
`ifdef LMEM_ENABLE
|
||||
// is local memory address
|
||||
wire [MEM_ADDRW-1:0] lmem_addr_start = MEM_ADDRW'(`XLEN'(`LMEM_BASE_ADDR) >> MEM_ASHIFT);
|
||||
|
|
|
@ -16,12 +16,12 @@
|
|||
#define IO_MPM_EXITCODE (IO_MPM_ADDR + 8)
|
||||
|
||||
#ifdef XLEN_64
|
||||
#define LOAD_IMMEDIATE(rd, imm) \
|
||||
#define LOAD_IMMEDIATE64(rd, imm) \
|
||||
li t0, (imm >> 32); \
|
||||
slli t0, t0, 32; \
|
||||
li rd, (imm & 0xffffffff); \
|
||||
or rd, rd, t0
|
||||
#else
|
||||
#define LOAD_IMMEDIATE(rd, imm) \
|
||||
#define LOAD_IMMEDIATE64(rd, imm) \
|
||||
li rd, imm
|
||||
#endif
|
||||
|
|
|
@ -18,9 +18,9 @@
|
|||
.type vx_putchar, @function
|
||||
.global vx_putchar
|
||||
vx_putchar:
|
||||
LOAD_IMMEDIATE(t1, IO_COUT_ADDR)
|
||||
csrr t0, VX_CSR_MHARTID
|
||||
andi t0, t0, %lo(IO_COUT_SIZE-1)
|
||||
li t1, IO_COUT_ADDR
|
||||
add t0, t0, t1
|
||||
sb a0, 0(t0)
|
||||
ret
|
||||
|
|
|
@ -70,8 +70,8 @@ _start:
|
|||
.global _Exit
|
||||
_Exit:
|
||||
call vx_perf_dump
|
||||
LOAD_IMMEDIATE(t1, IO_MPM_EXITCODE)
|
||||
sw a0, 0(t1)
|
||||
li t0, IO_MPM_EXITCODE
|
||||
sw a0, 0(t0)
|
||||
fence
|
||||
.insn r RISCV_CUSTOM0, 0, 0, x0, x0, x0 # tmc x0
|
||||
|
||||
|
@ -86,7 +86,7 @@ init_regs:
|
|||
.option pop
|
||||
|
||||
# set stack pointer register
|
||||
LOAD_IMMEDIATE(sp, STACK_BASE_ADDR)
|
||||
LOAD_IMMEDIATE64(sp, STACK_BASE_ADDR)
|
||||
csrr t0, VX_CSR_MHARTID
|
||||
sll t1, t0, STACK_LOG2_SIZE
|
||||
sub sp, sp, t1
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
|
||||
#define RAM_PAGE_SIZE 4096
|
||||
|
||||
#define ALLOC_BASE_ADDR CACHE_BLOCK_SIZE
|
||||
#define ALLOC_BASE_ADDR USER_BASE_ADDR
|
||||
|
||||
#if (XLEN == 64)
|
||||
#define GLOBAL_MEM_SIZE 0x200000000 // 8 GB
|
||||
|
|
|
@ -70,7 +70,7 @@ public:
|
|||
size = alignSize(size, pageAlign_);
|
||||
|
||||
// Check if the reservation is within memory capacity bounds
|
||||
if (addr < baseAddress_ || addr + size > baseAddress_ + capacity_) {
|
||||
if (addr + size > capacity_) {
|
||||
printf("error: address range out of bounds\n");
|
||||
return -1;
|
||||
}
|
||||
|
|
|
@ -75,13 +75,16 @@ using namespace vortex;
|
|||
class vx_device {
|
||||
public:
|
||||
vx_device()
|
||||
: fpga_(nullptr),
|
||||
global_mem_(ALLOC_BASE_ADDR,
|
||||
: fpga_(nullptr)
|
||||
, global_mem_(ALLOC_BASE_ADDR,
|
||||
GLOBAL_MEM_SIZE - ALLOC_BASE_ADDR,
|
||||
RAM_PAGE_SIZE,
|
||||
CACHE_BLOCK_SIZE),
|
||||
staging_wsid_(0), staging_ioaddr_(0), staging_ptr_(nullptr),
|
||||
staging_size_(0) {}
|
||||
CACHE_BLOCK_SIZE)
|
||||
, staging_wsid_(0)
|
||||
, staging_ioaddr_(0)
|
||||
, staging_ptr_(nullptr)
|
||||
, staging_size_(0)
|
||||
{}
|
||||
|
||||
~vx_device() {
|
||||
#ifdef SCOPE
|
||||
|
|
|
@ -32,7 +32,10 @@ class vx_device {
|
|||
public:
|
||||
vx_device()
|
||||
: ram_(0, RAM_PAGE_SIZE)
|
||||
, global_mem_(ALLOC_BASE_ADDR, GLOBAL_MEM_SIZE - ALLOC_BASE_ADDR, RAM_PAGE_SIZE, CACHE_BLOCK_SIZE)
|
||||
, global_mem_(ALLOC_BASE_ADDR,
|
||||
GLOBAL_MEM_SIZE - ALLOC_BASE_ADDR,
|
||||
RAM_PAGE_SIZE,
|
||||
CACHE_BLOCK_SIZE)
|
||||
{
|
||||
processor_.attach_ram(&ram_);
|
||||
}
|
||||
|
|
|
@ -35,7 +35,10 @@ public:
|
|||
: arch_(NUM_THREADS, NUM_WARPS, NUM_CORES)
|
||||
, ram_(0, RAM_PAGE_SIZE)
|
||||
, processor_(arch_)
|
||||
, global_mem_(ALLOC_BASE_ADDR, GLOBAL_MEM_SIZE - ALLOC_BASE_ADDR, RAM_PAGE_SIZE, CACHE_BLOCK_SIZE)
|
||||
, global_mem_(ALLOC_BASE_ADDR,
|
||||
GLOBAL_MEM_SIZE - ALLOC_BASE_ADDR,
|
||||
RAM_PAGE_SIZE,
|
||||
CACHE_BLOCK_SIZE)
|
||||
{
|
||||
// attach memory module
|
||||
processor_.attach_ram(&ram_);
|
||||
|
|
|
@ -134,12 +134,13 @@ static void wait_for_enter(const std::string &msg) {
|
|||
class vx_device {
|
||||
public:
|
||||
vx_device()
|
||||
: xrtDevice_(nullptr), xrtKernel_(nullptr),
|
||||
global_mem_(ALLOC_BASE_ADDR,
|
||||
: xrtDevice_(nullptr)
|
||||
, xrtKernel_(nullptr)
|
||||
, global_mem_(ALLOC_BASE_ADDR,
|
||||
GLOBAL_MEM_SIZE - ALLOC_BASE_ADDR,
|
||||
RAM_PAGE_SIZE,
|
||||
CACHE_BLOCK_SIZE)
|
||||
{}
|
||||
{}
|
||||
|
||||
~vx_device() {
|
||||
#ifdef SCOPE
|
||||
|
|
|
@ -26,19 +26,15 @@
|
|||
using namespace vortex;
|
||||
|
||||
static void show_usage() {
|
||||
std::cout << "Usage: [-r: riscv-test] [-h: help] <program>" << std::endl;
|
||||
std::cout << "Usage: [-h: help] <program>" << std::endl;
|
||||
}
|
||||
|
||||
bool riscv_test = false;
|
||||
const char* program = nullptr;
|
||||
|
||||
static void parse_args(int argc, char **argv) {
|
||||
int c;
|
||||
while ((c = getopt(argc, argv, "rh?")) != -1) {
|
||||
switch (c) {
|
||||
case 'r':
|
||||
riscv_test = true;
|
||||
break;
|
||||
case 'h':
|
||||
case '?':
|
||||
show_usage();
|
||||
|
|
|
@ -29,7 +29,7 @@
|
|||
using namespace vortex;
|
||||
|
||||
static void show_usage() {
|
||||
std::cout << "Usage: [-c <cores>] [-w <warps>] [-t <threads>] [-r: riscv-test] [-s: stats] [-h: help] <program>" << std::endl;
|
||||
std::cout << "Usage: [-c <cores>] [-w <warps>] [-t <threads>] [-s: stats] [-h: help] <program>" << std::endl;
|
||||
}
|
||||
|
||||
uint32_t num_threads = NUM_THREADS;
|
||||
|
|
|
@ -142,7 +142,7 @@ enum class AddrType {
|
|||
};
|
||||
|
||||
inline AddrType get_addr_type(uint64_t addr) {
|
||||
if (addr >= IO_BASE_ADDR) {
|
||||
if (addr >= IO_BASE_ADDR && addr < IO_END_ADDR) {
|
||||
return AddrType::IO;
|
||||
}
|
||||
if (LMEM_ENABLED) {
|
||||
|
|
|
@ -23,7 +23,7 @@
|
|||
const char* kernel_file = "kernel.vxbin";
|
||||
uint32_t count = 0;
|
||||
|
||||
static uint64_t io_base_addr = IO_MPM_ADDR + IO_MPM_SIZE;
|
||||
static uint64_t io_base_addr = IO_MPM_ADDR;
|
||||
uint64_t usr_test_addr;
|
||||
|
||||
vx_device_h device = nullptr;
|
||||
|
|
|
@ -7,9 +7,9 @@ TESTS := $(wildcard $(TEST_DIR)/*.bin)
|
|||
all:
|
||||
|
||||
run-simx:
|
||||
$(foreach test, $(TESTS), $(SIM_DIR)/simx/simx $(test) || exit;)
|
||||
@for test in $(TESTS); do $(SIM_DIR)/simx/simx $$test || exit 1; done
|
||||
|
||||
run-rtlsim:
|
||||
$(foreach test, $(TESTS), $(SIM_DIR)/rtlsim/rtlsim $(test) || exit;)
|
||||
@for test in $(TESTS); do $(SIM_DIR)/rtlsim/rtlsim $$test || exit 1; done
|
||||
|
||||
clean:
|
|
@ -7,9 +7,9 @@ TESTS := $(wildcard $(TEST_DIR)/*.bin)
|
|||
all:
|
||||
|
||||
run-simx:
|
||||
$(foreach test, $(TESTS), $(SIM_DIR)/simx/simx $(test) || exit;)
|
||||
@for test in $(TESTS); do $(SIM_DIR)/simx/simx $$test || exit 1; done
|
||||
|
||||
run-rtlsim:
|
||||
$(foreach test, $(TESTS), $(SIM_DIR)/rtlsim/rtlsim $(test) || exit;)
|
||||
@for test in $(TESTS); do $(SIM_DIR)/rtlsim/rtlsim $$test || exit 1; done
|
||||
|
||||
clean:
|
|
@ -27,34 +27,34 @@ TESTS_64D := $(wildcard $(TEST_DIR)/rv64ud-p-*.bin)
|
|||
all:
|
||||
|
||||
run-simx-32imafd:
|
||||
$(foreach test, $(TESTS_32I) $(TESTS_32M) $(TESTS_32F) $(TESTS_32D) $(TESTS_32A), $(SIM_DIR)/simx/simx $(test) || exit;)
|
||||
@for test in $(TESTS_32I) $(TESTS_32M) $(TESTS_32F) $(TESTS_32D) $(TESTS_32A); do $(SIM_DIR)/simx/simx $$test || exit 1; done
|
||||
|
||||
run-simx-64imafd:
|
||||
$(foreach test, $(TESTS_64I) $(TESTS_64M) $(TESTS_64F) $(TESTS_64D) $(TESTS_64A), $(SIM_DIR)/simx/simx $(test) || exit;)
|
||||
@for test in $(TESTS_64I) $(TESTS_64M) $(TESTS_64F) $(TESTS_64D) $(TESTS_64A); do $(SIM_DIR)/simx/simx $$test || exit 1; done
|
||||
|
||||
run-simx-32i:
|
||||
$(foreach test, $(TESTS_32I), $(SIM_DIR)/simx/simx $(test) || exit;)
|
||||
@for test in $(TESTS_32I); do $(SIM_DIR)/simx/simx $$test || exit 1; done
|
||||
|
||||
run-simx-32im:
|
||||
$(foreach test, $(TESTS_32I) $(TESTS_32M), $(SIM_DIR)/simx/simx $(test) || exit;)
|
||||
@for test in $(TESTS_32I) $(TESTS_32M); do $(SIM_DIR)/simx/simx $$test || exit 1; done
|
||||
|
||||
run-simx-32f:
|
||||
$(foreach test, $(TESTS_32F), $(SIM_DIR)/simx/simx $(test) || exit;)
|
||||
@for test in $(TESTS_32F); do $(SIM_DIR)/simx/simx $$test || exit 1; done
|
||||
|
||||
run-simx-32d:
|
||||
$(foreach test, $(TESTS_32D), $(SIM_DIR)/simx/simx $(test) || exit;)
|
||||
@for test in $(TESTS_32D); do $(SIM_DIR)/simx/simx $$test || exit 1; done
|
||||
|
||||
run-simx-64im:
|
||||
$(foreach test, $(TESTS_64I) $(TESTS_64M), $(SIM_DIR)/simx/simx $(test) || exit;)
|
||||
@for test in $(TESTS_64I) $(TESTS_64M); do $(SIM_DIR)/simx/simx $$test || exit 1; done
|
||||
|
||||
run-simx-64f:
|
||||
$(foreach test, $(TESTS_64F), $(SIM_DIR)/simx/simx $(test) || exit;)
|
||||
@for test in $(TESTS_64F); do $(SIM_DIR)/simx/simx $$test || exit 1; done
|
||||
|
||||
run-simx-64fx:
|
||||
$(foreach test, $(TESTS_64FX), $(SIM_DIR)/simx/simx $(test) || exit;)
|
||||
@for test in $(TESTS_64FX); do $(SIM_DIR)/simx/simx $$test || exit 1; done
|
||||
|
||||
run-simx-64d:
|
||||
$(foreach test, $(TESTS_64D), $(SIM_DIR)/simx/simx $(test) || exit;)
|
||||
@for test in $(TESTS_64D); do $(SIM_DIR)/simx/simx $$test || exit 1; done
|
||||
|
||||
run-simx-32: run-simx-32imafd
|
||||
|
||||
|
@ -63,31 +63,31 @@ run-simx-64: run-simx-32imafd run-simx-64imafd
|
|||
run-simx: run-simx-$(XLEN)
|
||||
|
||||
run-rtlsim-32imf:
|
||||
$(foreach test, $(TESTS_32I) $(TESTS_32M) $(TESTS_32F), $(SIM_DIR)/rtlsim/rtlsim $(test) || exit;)
|
||||
@for test in $(TESTS_32I) $(TESTS_32M) $(TESTS_32F); do $(SIM_DIR)/rtlsim/rtlsim $$test || exit 1; done
|
||||
|
||||
run-rtlsim-64imf:
|
||||
$(foreach test, $(TESTS_64I) $(TESTS_64M) $(TESTS_64F), $(SIM_DIR)/rtlsim/rtlsim $(test) || exit;)
|
||||
@for test in $(TESTS_64I) $(TESTS_64M) $(TESTS_64F); do $(SIM_DIR)/rtlsim/rtlsim $$test || exit 1; done
|
||||
|
||||
run-rtlsim-32i:
|
||||
$(foreach test, $(TESTS_32I), $(SIM_DIR)/rtlsim/rtlsim $(test) || exit;)
|
||||
@for test in $(TESTS_32I); do $(SIM_DIR)/rtlsim/rtlsim $$test || exit 1; done
|
||||
|
||||
run-rtlsim-32im:
|
||||
$(foreach test, $(TESTS_32I) $(TESTS_32M), $(SIM_DIR)/rtlsim/rtlsim $(test) || exit;)
|
||||
@for test in $(TESTS_32I) $(TESTS_32M); do $(SIM_DIR)/rtlsim/rtlsim $$test || exit 1; done
|
||||
|
||||
run-rtlsim-32f:
|
||||
$(foreach test, $(TESTS_32F), $(SIM_DIR)/rtlsim/rtlsim $(test) || exit;)
|
||||
@for test in $(TESTS_32F); do $(SIM_DIR)/rtlsim/rtlsim $$test || exit 1; done
|
||||
|
||||
run-rtlsim-64im:
|
||||
$(foreach test, $(TESTS_64I) $(TESTS_64M), $(SIM_DIR)/rtlsim/rtlsim $(test) || exit;)
|
||||
@for test in $(TESTS_64I) $(TESTS_64M); do $(SIM_DIR)/rtlsim/rtlsim $$test || exit 1; done
|
||||
|
||||
run-rtlsim-64f:
|
||||
$(foreach test, $(TESTS_64F), $(SIM_DIR)/rtlsim/rtlsim $(test) || exit;)
|
||||
@for test in $(TESTS_64F); do $(SIM_DIR)/rtlsim/rtlsim $$test || exit 1; done
|
||||
|
||||
run-rtlsim-64fx:
|
||||
$(foreach test, $(TESTS_64FX), $(SIM_DIR)/rtlsim/rtlsim $(test) || exit;)
|
||||
@for test in $(TESTS_64FX); do $(SIM_DIR)/rtlsim/rtlsim $$test || exit 1; done
|
||||
|
||||
run-rtlsim-64d:
|
||||
$(foreach test, $(TESTS_64D), $(SIM_DIR)/rtlsim/rtlsim $(test) || exit;)
|
||||
@for test in $(TESTS_64D); do $(SIM_DIR)/rtlsim/rtlsim $$test || exit 1; done
|
||||
|
||||
run-rtlsim-32: run-rtlsim-32imf
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue