fmadd fix

This commit is contained in:
Blaise Tine 2020-09-06 01:20:22 -07:00
parent 49b86c4b2a
commit 75c98c6ea3
3 changed files with 9 additions and 3 deletions

View file

@ -491,6 +491,12 @@ extern int vx_start(vx_device_h hdevice) {
// start execution
CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CMD_TYPE, CMD_RUN));
#ifdef SCOPE
sleep(15);
vx_scope_stop(device->fpga, 0);
exit(0);
#endif
return 0;
}

View file

@ -79,6 +79,7 @@ tar -zcvf trace.vcd.tar.gz obj_dir/trace.vcd
tar -zcvf trace.vcd.tar.gz trace.vcd
tar -zcvf run.log.tar.gz run.log
tar -cvjf vortex.vcd.tar.bz2 build_ase_1c/work/vortex.vcd
tar -zcvf vortex.vcd.tar.gz build_ase_1c/work/vortex.vcd
# decompress VCD trace
tar -zxvf /mnt/c/Users/Blaise/Downloads/vortex.vcd.tar.gz
@ -104,6 +105,5 @@ make -C top clean && make -C top > top/build.log 2>&1 &
200 Mhz -> period = 1/200x10^6 = 5ns
if slack = +1.664 -> minimal period = 5-1.664 = 3.336 -> fmax = 1/3.336 = 300 Mhz
# build rtlsim from driver tests
make -C ../../rtlsim clean && reset && make -C ../../rtlsim

View file

@ -93,7 +93,7 @@ module VX_fp_nmadd #(
.ay(datab[i]),
.az(dataa[i]),
.clk({2'b00,clk}),
.ena({2'b11,enable0}),
.ena({2'b11,enable}),
.aclr(2'b00),
.chainin(),
// outputs
@ -133,7 +133,7 @@ module VX_fp_nmadd #(
.ay(result_st0),
.az(),
.clk({2'b00,clk}),
.ena({2'b11,enable1}),
.ena({2'b11,enable}),
.aclr(2'b00),
.chainin(),
// outputs