mirror of
https://github.com/vortexgpgpu/vortex.git
synced 2025-04-24 13:57:17 -04:00
minor update
This commit is contained in:
Blaise Tine
parent
ff7e1a44a2
commit
76c14a568e
13 changed files with 16515 additions and 19186 deletions
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@ -13,6 +13,9 @@
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///////////////////////////////////////////////////////////////////////////////
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`ifdef VERILATOR
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`define TRACING_ON /* verilator tracing_on */
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`define TRACING_OFF /* verilator tracing_off */
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`ifndef NDEBUG
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`define DEBUG_BLOCK(x) /* verilator lint_off UNUSED */ \
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x \
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@ -54,6 +57,24 @@
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`define UNUSED_PIN(x) /* verilator lint_off PINCONNECTEMPTY */ \
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. x () \
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/* verilator lint_on PINCONNECTEMPTY */
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`define TRACE(level, args) dpi_trace(level, $sformatf args)
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`else
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`define TRACING_ON
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`define TRACING_OFF
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`ifndef NDEBUG
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`define DEBUG_BLOCK(x) x
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`else
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`define DEBUG_BLOCK(x)
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`endif
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`define IGNORE_UNUSED_BEGIN
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`define IGNORE_UNUSED_END
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`define IGNORE_WARNINGS_BEGIN
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`define IGNORE_WARNINGS_END
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`define UNUSED_PARAM(x)
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`define UNUSED_VAR(x)
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`define UNUSED_PIN(x) . x ()
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`define TRACE(level, args) $write args
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`endif
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`define STATIC_ASSERT(cond, msg) \
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generate \
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@ -71,15 +92,6 @@
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assert(cond) else $error msg; \
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end
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`ifdef VERILATOR
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`define TRACE(level, args) dpi_trace(level, $sformatf args)
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`else
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`define TRACE(level, args) $write args
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`endif
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`define TRACING_ON /* verilator tracing_on */
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`define TRACING_OFF /* verilator tracing_off */
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///////////////////////////////////////////////////////////////////////////////
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`ifdef QUARTUS
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@ -89,10 +101,14 @@
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`define PRESERVE_REG (* preserve *)
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`define STRING_TYPE string
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`elsif VIVADO
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`define USE_FAST_BRAM (* ram_style = "distributed" *)
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`define NO_RW_RAM_CHECK (* rw_addr_collision = "no" *)
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`define DISABLE_BRAM (* ram_style = "registers" *)
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`define PRESERVE_REG (* keep = "true" *)
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//`define USE_FAST_BRAM (* ram_style = "distributed" *)
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//`define NO_RW_RAM_CHECK (* rw_addr_collision = "no" *)
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//`define DISABLE_BRAM (* ram_style = "registers" *)
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//`define PRESERVE_REG (* keep = "true" *)
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`define USE_FAST_BRAM
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`define NO_RW_RAM_CHECK
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`define DISABLE_BRAM
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`define PRESERVE_REG
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`define STRING_TYPE
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`else
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`define USE_FAST_BRAM
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@ -3,8 +3,12 @@ VIVADO = $(XILINX_VIVADO)/bin/vivado
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all: create_project
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create_project: project_1.tcl
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create_project: project_1
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project_1: project_1.tcl
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$(VIVADO) -mode batch -source project_1.tcl
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run: create_project
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$(VIVADO) project_1/project_1.xpr &
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clean:
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rm -rf project_1
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@ -1,5 +1,7 @@
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RISCV_TOOLCHAIN_PATH ?= /opt/riscv-gnu-toolchain
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VORTEX_RT_PATH ?= $(realpath ../../../runtime)
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VORTEX_RT_PATH ?= $(realpath ../../../../../kernel)
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BIN2COE ?= ../../../../../../bin2coe/bin2coe
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CC = $(RISCV_TOOLCHAIN_PATH)/bin/riscv32-unknown-elf-gcc
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AR = $(RISCV_TOOLCHAIN_PATH)/bin/riscv32-unknown-elf-gcc-ar
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@ -9,21 +11,26 @@ CP = $(RISCV_TOOLCHAIN_PATH)/bin/riscv32-unknown-elf-objcopy
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CFLAGS += -march=rv32imf -mabi=ilp32f -O3 -Wstack-usage=1024 -ffreestanding -nostartfiles -fdata-sections -ffunction-sections
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CFLAGS += -I$(VORTEX_RT_PATH)/include -I$(VORTEX_RT_PATH)/../hw
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LDFLAGS += -lm -Wl,-Bstatic,-T,$(VORTEX_RT_PATH)/linker/vx_link.ld -Wl,--gc-sections $(VORTEX_RT_PATH)/libvortexrt.a
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LDFLAGS += -lm -Wl,-Bstatic,-T,$(VORTEX_RT_PATH)/linker/vx_link32.ld -Wl,--gc-sections $(VORTEX_RT_PATH)/libvortexrt.a
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PROJECT = fibonacci
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SRCS = main.cpp
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all: $(PROJECT).elf $(PROJECT).hex $(PROJECT).dump
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all: $(PROJECT).elf $(PROJECT).hex $(PROJECT).bin $(PROJECT).dump $(PROJECT).bin.coe
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$(PROJECT).dump: $(PROJECT).elf
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$(DP) -D $(PROJECT).elf > $(PROJECT).dump
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$(PROJECT).hex: $(PROJECT).elf
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$(CP) -O ihex $(PROJECT).elf $(PROJECT).hex
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$(PROJECT).bin: $(PROJECT).elf
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$(CP) -O binary $(PROJECT).elf $(PROJECT).bin
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$(PROJECT).bin.coe: $(PROJECT).bin
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$(BIN2COE) $(PROJECT).bin --in $(PROJECT).bin --offset=8192 --depth=16384 --word=64
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$(PROJECT).elf: $(SRCS)
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$(CC) $(CFLAGS) $(SRCS) $(LDFLAGS) -o $(PROJECT).elf
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@ -37,4 +44,4 @@ run-simx: $(PROJECT).hex
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$(CC) $(CFLAGS) -MM $^ > .depend;
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clean:
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rm -rf *.elf *.hex *.dump .depend
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rm -rf *.bin *.elf *.hex *.dump *.coe .depend
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Binary file not shown.
File diff suppressed because it is too large
Load diff
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@ -1,688 +0,0 @@
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fibonacci.elf: file format elf32-littleriscv
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Disassembly of section .init:
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00080000 <_start>:
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80000: 00000597 auipc a1,0x0
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80004: 1e458593 addi a1,a1,484 # 801e4 <vx_set_sp>
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80008: fc102573 csrr a0,0xfc1
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8000c: 00b5106b 0xb5106b
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80010: 1d4000ef jal ra,801e4 <vx_set_sp>
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80014: 00100513 li a0,1
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80018: 0005006b 0x5006b
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8001c: 00002517 auipc a0,0x2
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80020: cb050513 addi a0,a0,-848 # 81ccc <__BSS_END__>
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80024: 00002617 auipc a2,0x2
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80028: ca860613 addi a2,a2,-856 # 81ccc <__BSS_END__>
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8002c: 40a60633 sub a2,a2,a0
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80030: 00000593 li a1,0
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80034: 53c000ef jal ra,80570 <memset>
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80038: 00000517 auipc a0,0x0
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8003c: 27c50513 addi a0,a0,636 # 802b4 <__libc_fini_array>
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80040: 4e8000ef jal ra,80528 <atexit>
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80044: 1d4000ef jal ra,80218 <__libc_init_array>
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80048: 008000ef jal ra,80050 <main>
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8004c: 4f00006f j 8053c <exit>
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Disassembly of section .text:
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00080050 <main>:
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80050: fd010113 addi sp,sp,-48
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80054: 000807b7 lui a5,0x80
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80058: 02812423 sw s0,40(sp)
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8005c: ff07a403 lw s0,-16(a5) # 7fff0 <__stack_size+0x7fbf0>
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80060: 01412c23 sw s4,24(sp)
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80064: 02112623 sw ra,44(sp)
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80068: 02912223 sw s1,36(sp)
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8006c: 03212023 sw s2,32(sp)
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80070: 01312e23 sw s3,28(sp)
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80074: 01512a23 sw s5,20(sp)
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80078: 01612823 sw s6,16(sp)
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8007c: 01712623 sw s7,12(sp)
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80080: 01812423 sw s8,8(sp)
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80084: 00100793 li a5,1
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80088: 00000a13 li s4,0
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8008c: 0687d663 bge a5,s0,800f8 <main+0xa8>
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80090: ffe40b13 addi s6,s0,-2
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80094: ffb40a93 addi s5,s0,-5
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80098: ffeb7793 andi a5,s6,-2
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8009c: fff40c13 addi s8,s0,-1
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800a0: 40fa8ab3 sub s5,s5,a5
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800a4: ffd40413 addi s0,s0,-3
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800a8: 00000a13 li s4,0
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800ac: 00100b93 li s7,1
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800b0: 097c0463 beq s8,s7,80138 <main+0xe8>
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800b4: fff40793 addi a5,s0,-1
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800b8: ffe47913 andi s2,s0,-2
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800bc: 00140493 addi s1,s0,1
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800c0: 41278933 sub s2,a5,s2
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800c4: 00000993 li s3,0
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800c8: 00048513 mv a0,s1
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800cc: 08c000ef jal ra,80158 <_Z9fibonaccii>
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800d0: ffe48493 addi s1,s1,-2
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800d4: 00a989b3 add s3,s3,a0
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800d8: ff2498e3 bne s1,s2,800c8 <main+0x78>
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800dc: 00147793 andi a5,s0,1
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800e0: 013789b3 add s3,a5,s3
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800e4: ffe40413 addi s0,s0,-2
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800e8: 013a0a33 add s4,s4,s3
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800ec: ffec0c13 addi s8,s8,-2
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800f0: fd5410e3 bne s0,s5,800b0 <main+0x60>
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800f4: 001b7413 andi s0,s6,1
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800f8: 008a0433 add s0,s4,s0
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800fc: 000807b7 lui a5,0x80
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80100: 02c12083 lw ra,44(sp)
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80104: fe87a823 sw s0,-16(a5) # 7fff0 <__stack_size+0x7fbf0>
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80108: 02812403 lw s0,40(sp)
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8010c: 02412483 lw s1,36(sp)
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80110: 02012903 lw s2,32(sp)
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80114: 01c12983 lw s3,28(sp)
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80118: 01812a03 lw s4,24(sp)
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8011c: 01412a83 lw s5,20(sp)
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80120: 01012b03 lw s6,16(sp)
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80124: 00c12b83 lw s7,12(sp)
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80128: 00812c03 lw s8,8(sp)
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8012c: 00000513 li a0,0
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80130: 03010113 addi sp,sp,48
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80134: 00008067 ret
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80138: 00100993 li s3,1
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8013c: fa9ff06f j 800e4 <main+0x94>
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00080140 <register_fini>:
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80140: 00000793 li a5,0
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80144: 00078863 beqz a5,80154 <register_fini+0x14>
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80148: 00080537 lui a0,0x80
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8014c: 2b450513 addi a0,a0,692 # 802b4 <__libc_fini_array>
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80150: 3d80006f j 80528 <atexit>
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80154: 00008067 ret
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||||
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00080158 <_Z9fibonaccii>:
|
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80158: 00100793 li a5,1
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8015c: 06a7d663 bge a5,a0,801c8 <_Z9fibonaccii+0x70>
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||||
80160: fe010113 addi sp,sp,-32
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||||
80164: 01312623 sw s3,12(sp)
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80168: ffe50993 addi s3,a0,-2
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8016c: 01212823 sw s2,16(sp)
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80170: ffe9f793 andi a5,s3,-2
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||||
80174: ffd50913 addi s2,a0,-3
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||||
80178: 00812c23 sw s0,24(sp)
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8017c: 00912a23 sw s1,20(sp)
|
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80180: 00112e23 sw ra,28(sp)
|
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80184: fff50493 addi s1,a0,-1
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80188: 40f90933 sub s2,s2,a5
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8018c: 00000413 li s0,0
|
||||
80190: 00048513 mv a0,s1
|
||||
80194: fc5ff0ef jal ra,80158 <_Z9fibonaccii>
|
||||
80198: ffe48493 addi s1,s1,-2
|
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8019c: 00a40433 add s0,s0,a0
|
||||
801a0: ff2498e3 bne s1,s2,80190 <_Z9fibonaccii+0x38>
|
||||
801a4: 0019f513 andi a0,s3,1
|
||||
801a8: 01c12083 lw ra,28(sp)
|
||||
801ac: 00850533 add a0,a0,s0
|
||||
801b0: 01812403 lw s0,24(sp)
|
||||
801b4: 01412483 lw s1,20(sp)
|
||||
801b8: 01012903 lw s2,16(sp)
|
||||
801bc: 00c12983 lw s3,12(sp)
|
||||
801c0: 02010113 addi sp,sp,32
|
||||
801c4: 00008067 ret
|
||||
801c8: 00008067 ret
|
||||
|
||||
000801cc <_exit>:
|
||||
801cc: 00050663 beqz a0,801d8 <label_exit_next>
|
||||
801d0: 00050193 mv gp,a0
|
||||
801d4: 00000073 ecall
|
||||
|
||||
000801d8 <label_exit_next>:
|
||||
801d8: 138000ef jal ra,80310 <vx_perf_dump>
|
||||
801dc: 00000513 li a0,0
|
||||
801e0: 0005006b 0x5006b
|
||||
|
||||
000801e4 <vx_set_sp>:
|
||||
801e4: fff00513 li a0,-1
|
||||
801e8: 0005006b 0x5006b
|
||||
801ec: 00002197 auipc gp,0x2
|
||||
801f0: eb418193 addi gp,gp,-332 # 820a0 <__global_pointer>
|
||||
801f4: 000ff137 lui sp,0xff
|
||||
801f8: cc102673 csrr a2,0xcc1
|
||||
801fc: 00a61593 slli a1,a2,0xa
|
||||
80200: 40b10133 sub sp,sp,a1
|
||||
80204: cc3026f3 csrr a3,0xcc3
|
||||
80208: 00068663 beqz a3,80214 <RETURN>
|
||||
8020c: 00000513 li a0,0
|
||||
80210: 0005006b 0x5006b
|
||||
|
||||
00080214 <RETURN>:
|
||||
80214: 00008067 ret
|
||||
|
||||
00080218 <__libc_init_array>:
|
||||
80218: ff010113 addi sp,sp,-16 # feff0 <__global_pointer+0x7cf50>
|
||||
8021c: 00812423 sw s0,8(sp)
|
||||
80220: 01212023 sw s2,0(sp)
|
||||
80224: 00082437 lui s0,0x82
|
||||
80228: 00082937 lui s2,0x82
|
||||
8022c: 89840793 addi a5,s0,-1896 # 81898 <__init_array_start>
|
||||
80230: 89890913 addi s2,s2,-1896 # 81898 <__init_array_start>
|
||||
80234: 40f90933 sub s2,s2,a5
|
||||
80238: 00112623 sw ra,12(sp)
|
||||
8023c: 00912223 sw s1,4(sp)
|
||||
80240: 40295913 srai s2,s2,0x2
|
||||
80244: 02090063 beqz s2,80264 <__libc_init_array+0x4c>
|
||||
80248: 89840413 addi s0,s0,-1896
|
||||
8024c: 00000493 li s1,0
|
||||
80250: 00042783 lw a5,0(s0)
|
||||
80254: 00148493 addi s1,s1,1
|
||||
80258: 00440413 addi s0,s0,4
|
||||
8025c: 000780e7 jalr a5
|
||||
80260: fe9918e3 bne s2,s1,80250 <__libc_init_array+0x38>
|
||||
80264: 00082437 lui s0,0x82
|
||||
80268: 00082937 lui s2,0x82
|
||||
8026c: 89840793 addi a5,s0,-1896 # 81898 <__init_array_start>
|
||||
80270: 89c90913 addi s2,s2,-1892 # 8189c <__fini_array_end>
|
||||
80274: 40f90933 sub s2,s2,a5
|
||||
80278: 40295913 srai s2,s2,0x2
|
||||
8027c: 02090063 beqz s2,8029c <__libc_init_array+0x84>
|
||||
80280: 89840413 addi s0,s0,-1896
|
||||
80284: 00000493 li s1,0
|
||||
80288: 00042783 lw a5,0(s0)
|
||||
8028c: 00148493 addi s1,s1,1
|
||||
80290: 00440413 addi s0,s0,4
|
||||
80294: 000780e7 jalr a5
|
||||
80298: fe9918e3 bne s2,s1,80288 <__libc_init_array+0x70>
|
||||
8029c: 00c12083 lw ra,12(sp)
|
||||
802a0: 00812403 lw s0,8(sp)
|
||||
802a4: 00412483 lw s1,4(sp)
|
||||
802a8: 00012903 lw s2,0(sp)
|
||||
802ac: 01010113 addi sp,sp,16
|
||||
802b0: 00008067 ret
|
||||
|
||||
000802b4 <__libc_fini_array>:
|
||||
802b4: ff010113 addi sp,sp,-16
|
||||
802b8: 00812423 sw s0,8(sp)
|
||||
802bc: 000827b7 lui a5,0x82
|
||||
802c0: 00082437 lui s0,0x82
|
||||
802c4: 89c40413 addi s0,s0,-1892 # 8189c <__fini_array_end>
|
||||
802c8: 89c78793 addi a5,a5,-1892 # 8189c <__fini_array_end>
|
||||
802cc: 408787b3 sub a5,a5,s0
|
||||
802d0: 00912223 sw s1,4(sp)
|
||||
802d4: 00112623 sw ra,12(sp)
|
||||
802d8: 4027d493 srai s1,a5,0x2
|
||||
802dc: 02048063 beqz s1,802fc <__libc_fini_array+0x48>
|
||||
802e0: ffc78793 addi a5,a5,-4
|
||||
802e4: 00878433 add s0,a5,s0
|
||||
802e8: 00042783 lw a5,0(s0)
|
||||
802ec: fff48493 addi s1,s1,-1
|
||||
802f0: ffc40413 addi s0,s0,-4
|
||||
802f4: 000780e7 jalr a5
|
||||
802f8: fe0498e3 bnez s1,802e8 <__libc_fini_array+0x34>
|
||||
802fc: 00c12083 lw ra,12(sp)
|
||||
80300: 00812403 lw s0,8(sp)
|
||||
80304: 00412483 lw s1,4(sp)
|
||||
80308: 01010113 addi sp,sp,16
|
||||
8030c: 00008067 ret
|
||||
|
||||
00080310 <vx_perf_dump>:
|
||||
80310: cc5027f3 csrr a5,0xcc5
|
||||
80314: 00001737 lui a4,0x1
|
||||
80318: ff070713 addi a4,a4,-16 # ff0 <__stack_size+0xbf0>
|
||||
8031c: 00e787b3 add a5,a5,a4
|
||||
80320: 00879793 slli a5,a5,0x8
|
||||
80324: b0002773 csrr a4,mcycle
|
||||
80328: 00e7a023 sw a4,0(a5)
|
||||
8032c: b0102773 csrr a4,0xb01
|
||||
80330: 00e7a223 sw a4,4(a5)
|
||||
80334: b0202773 csrr a4,minstret
|
||||
80338: 00e7a423 sw a4,8(a5)
|
||||
8033c: b0302773 csrr a4,mhpmcounter3
|
||||
80340: 00e7a623 sw a4,12(a5)
|
||||
80344: b0402773 csrr a4,mhpmcounter4
|
||||
80348: 00e7a823 sw a4,16(a5)
|
||||
8034c: b0502773 csrr a4,mhpmcounter5
|
||||
80350: 00e7aa23 sw a4,20(a5)
|
||||
80354: b0602773 csrr a4,mhpmcounter6
|
||||
80358: 00e7ac23 sw a4,24(a5)
|
||||
8035c: b0702773 csrr a4,mhpmcounter7
|
||||
80360: 00e7ae23 sw a4,28(a5)
|
||||
80364: b0802773 csrr a4,mhpmcounter8
|
||||
80368: 02e7a023 sw a4,32(a5)
|
||||
8036c: b0902773 csrr a4,mhpmcounter9
|
||||
80370: 02e7a223 sw a4,36(a5)
|
||||
80374: b0a02773 csrr a4,mhpmcounter10
|
||||
80378: 02e7a423 sw a4,40(a5)
|
||||
8037c: b0b02773 csrr a4,mhpmcounter11
|
||||
80380: 02e7a623 sw a4,44(a5)
|
||||
80384: b0c02773 csrr a4,mhpmcounter12
|
||||
80388: 02e7a823 sw a4,48(a5)
|
||||
8038c: b0d02773 csrr a4,mhpmcounter13
|
||||
80390: 02e7aa23 sw a4,52(a5)
|
||||
80394: b0e02773 csrr a4,mhpmcounter14
|
||||
80398: 02e7ac23 sw a4,56(a5)
|
||||
8039c: b0f02773 csrr a4,mhpmcounter15
|
||||
803a0: 02e7ae23 sw a4,60(a5)
|
||||
803a4: b1002773 csrr a4,mhpmcounter16
|
||||
803a8: 04e7a023 sw a4,64(a5)
|
||||
803ac: b1102773 csrr a4,mhpmcounter17
|
||||
803b0: 04e7a223 sw a4,68(a5)
|
||||
803b4: b1202773 csrr a4,mhpmcounter18
|
||||
803b8: 04e7a423 sw a4,72(a5)
|
||||
803bc: b1302773 csrr a4,mhpmcounter19
|
||||
803c0: 04e7a623 sw a4,76(a5)
|
||||
803c4: b1402773 csrr a4,mhpmcounter20
|
||||
803c8: 04e7a823 sw a4,80(a5)
|
||||
803cc: b1502773 csrr a4,mhpmcounter21
|
||||
803d0: 04e7aa23 sw a4,84(a5)
|
||||
803d4: b1602773 csrr a4,mhpmcounter22
|
||||
803d8: 04e7ac23 sw a4,88(a5)
|
||||
803dc: b1702773 csrr a4,mhpmcounter23
|
||||
803e0: 04e7ae23 sw a4,92(a5)
|
||||
803e4: b1802773 csrr a4,mhpmcounter24
|
||||
803e8: 06e7a023 sw a4,96(a5)
|
||||
803ec: b1902773 csrr a4,mhpmcounter25
|
||||
803f0: 06e7a223 sw a4,100(a5)
|
||||
803f4: b1a02773 csrr a4,mhpmcounter26
|
||||
803f8: 06e7a423 sw a4,104(a5)
|
||||
803fc: b1b02773 csrr a4,mhpmcounter27
|
||||
80400: 06e7a623 sw a4,108(a5)
|
||||
80404: b1c02773 csrr a4,mhpmcounter28
|
||||
80408: 06e7a823 sw a4,112(a5)
|
||||
8040c: b1d02773 csrr a4,mhpmcounter29
|
||||
80410: 06e7aa23 sw a4,116(a5)
|
||||
80414: b1e02773 csrr a4,mhpmcounter30
|
||||
80418: 06e7ac23 sw a4,120(a5)
|
||||
8041c: b1f02773 csrr a4,mhpmcounter31
|
||||
80420: 06e7ae23 sw a4,124(a5)
|
||||
80424: b8002773 csrr a4,mcycleh
|
||||
80428: 08e7a023 sw a4,128(a5)
|
||||
8042c: b8102773 csrr a4,0xb81
|
||||
80430: 08e7a223 sw a4,132(a5)
|
||||
80434: b8202773 csrr a4,minstreth
|
||||
80438: 08e7a423 sw a4,136(a5)
|
||||
8043c: b8302773 csrr a4,mhpmcounter3h
|
||||
80440: 08e7a623 sw a4,140(a5)
|
||||
80444: b8402773 csrr a4,mhpmcounter4h
|
||||
80448: 08e7a823 sw a4,144(a5)
|
||||
8044c: b8502773 csrr a4,mhpmcounter5h
|
||||
80450: 08e7aa23 sw a4,148(a5)
|
||||
80454: b8602773 csrr a4,mhpmcounter6h
|
||||
80458: 08e7ac23 sw a4,152(a5)
|
||||
8045c: b8702773 csrr a4,mhpmcounter7h
|
||||
80460: 08e7ae23 sw a4,156(a5)
|
||||
80464: b8802773 csrr a4,mhpmcounter8h
|
||||
80468: 0ae7a023 sw a4,160(a5)
|
||||
8046c: b8902773 csrr a4,mhpmcounter9h
|
||||
80470: 0ae7a223 sw a4,164(a5)
|
||||
80474: b8a02773 csrr a4,mhpmcounter10h
|
||||
80478: 0ae7a423 sw a4,168(a5)
|
||||
8047c: b8b02773 csrr a4,mhpmcounter11h
|
||||
80480: 0ae7a623 sw a4,172(a5)
|
||||
80484: b8c02773 csrr a4,mhpmcounter12h
|
||||
80488: 0ae7a823 sw a4,176(a5)
|
||||
8048c: b8d02773 csrr a4,mhpmcounter13h
|
||||
80490: 0ae7aa23 sw a4,180(a5)
|
||||
80494: b8e02773 csrr a4,mhpmcounter14h
|
||||
80498: 0ae7ac23 sw a4,184(a5)
|
||||
8049c: b8f02773 csrr a4,mhpmcounter15h
|
||||
804a0: 0ae7ae23 sw a4,188(a5)
|
||||
804a4: b9002773 csrr a4,mhpmcounter16h
|
||||
804a8: 0ce7a023 sw a4,192(a5)
|
||||
804ac: b9102773 csrr a4,mhpmcounter17h
|
||||
804b0: 0ce7a223 sw a4,196(a5)
|
||||
804b4: b9202773 csrr a4,mhpmcounter18h
|
||||
804b8: 0ce7a423 sw a4,200(a5)
|
||||
804bc: b9302773 csrr a4,mhpmcounter19h
|
||||
804c0: 0ce7a623 sw a4,204(a5)
|
||||
804c4: b9402773 csrr a4,mhpmcounter20h
|
||||
804c8: 0ce7a823 sw a4,208(a5)
|
||||
804cc: b9502773 csrr a4,mhpmcounter21h
|
||||
804d0: 0ce7aa23 sw a4,212(a5)
|
||||
804d4: b9602773 csrr a4,mhpmcounter22h
|
||||
804d8: 0ce7ac23 sw a4,216(a5)
|
||||
804dc: b9702773 csrr a4,mhpmcounter23h
|
||||
804e0: 0ce7ae23 sw a4,220(a5)
|
||||
804e4: b9802773 csrr a4,mhpmcounter24h
|
||||
804e8: 0ee7a023 sw a4,224(a5)
|
||||
804ec: b9902773 csrr a4,mhpmcounter25h
|
||||
804f0: 0ee7a223 sw a4,228(a5)
|
||||
804f4: b9a02773 csrr a4,mhpmcounter26h
|
||||
804f8: 0ee7a423 sw a4,232(a5)
|
||||
804fc: b9b02773 csrr a4,mhpmcounter27h
|
||||
80500: 0ee7a623 sw a4,236(a5)
|
||||
80504: b9c02773 csrr a4,mhpmcounter28h
|
||||
80508: 0ee7a823 sw a4,240(a5)
|
||||
8050c: b9d02773 csrr a4,mhpmcounter29h
|
||||
80510: 0ee7aa23 sw a4,244(a5)
|
||||
80514: b9e02773 csrr a4,mhpmcounter30h
|
||||
80518: 0ee7ac23 sw a4,248(a5)
|
||||
8051c: b9f02773 csrr a4,mhpmcounter31h
|
||||
80520: 0ee7ae23 sw a4,252(a5)
|
||||
80524: 00008067 ret
|
||||
|
||||
00080528 <atexit>:
|
||||
80528: 00050593 mv a1,a0
|
||||
8052c: 00000693 li a3,0
|
||||
80530: 00000613 li a2,0
|
||||
80534: 00000513 li a0,0
|
||||
80538: 1140006f j 8064c <__register_exitproc>
|
||||
|
||||
0008053c <exit>:
|
||||
8053c: ff010113 addi sp,sp,-16
|
||||
80540: 00000593 li a1,0
|
||||
80544: 00812423 sw s0,8(sp)
|
||||
80548: 00112623 sw ra,12(sp)
|
||||
8054c: 00050413 mv s0,a0
|
||||
80550: 198000ef jal ra,806e8 <__call_exitprocs>
|
||||
80554: 000827b7 lui a5,0x82
|
||||
80558: cc87a503 lw a0,-824(a5) # 81cc8 <_global_impure_ptr>
|
||||
8055c: 03c52783 lw a5,60(a0)
|
||||
80560: 00078463 beqz a5,80568 <exit+0x2c>
|
||||
80564: 000780e7 jalr a5
|
||||
80568: 00040513 mv a0,s0
|
||||
8056c: c61ff0ef jal ra,801cc <_exit>
|
||||
|
||||
00080570 <memset>:
|
||||
80570: 00f00313 li t1,15
|
||||
80574: 00050713 mv a4,a0
|
||||
80578: 02c37e63 bgeu t1,a2,805b4 <memset+0x44>
|
||||
8057c: 00f77793 andi a5,a4,15
|
||||
80580: 0a079063 bnez a5,80620 <memset+0xb0>
|
||||
80584: 08059263 bnez a1,80608 <memset+0x98>
|
||||
80588: ff067693 andi a3,a2,-16
|
||||
8058c: 00f67613 andi a2,a2,15
|
||||
80590: 00e686b3 add a3,a3,a4
|
||||
80594: 00b72023 sw a1,0(a4)
|
||||
80598: 00b72223 sw a1,4(a4)
|
||||
8059c: 00b72423 sw a1,8(a4)
|
||||
805a0: 00b72623 sw a1,12(a4)
|
||||
805a4: 01070713 addi a4,a4,16
|
||||
805a8: fed766e3 bltu a4,a3,80594 <memset+0x24>
|
||||
805ac: 00061463 bnez a2,805b4 <memset+0x44>
|
||||
805b0: 00008067 ret
|
||||
805b4: 40c306b3 sub a3,t1,a2
|
||||
805b8: 00269693 slli a3,a3,0x2
|
||||
805bc: 00000297 auipc t0,0x0
|
||||
805c0: 005686b3 add a3,a3,t0
|
||||
805c4: 00c68067 jr 12(a3)
|
||||
805c8: 00b70723 sb a1,14(a4)
|
||||
805cc: 00b706a3 sb a1,13(a4)
|
||||
805d0: 00b70623 sb a1,12(a4)
|
||||
805d4: 00b705a3 sb a1,11(a4)
|
||||
805d8: 00b70523 sb a1,10(a4)
|
||||
805dc: 00b704a3 sb a1,9(a4)
|
||||
805e0: 00b70423 sb a1,8(a4)
|
||||
805e4: 00b703a3 sb a1,7(a4)
|
||||
805e8: 00b70323 sb a1,6(a4)
|
||||
805ec: 00b702a3 sb a1,5(a4)
|
||||
805f0: 00b70223 sb a1,4(a4)
|
||||
805f4: 00b701a3 sb a1,3(a4)
|
||||
805f8: 00b70123 sb a1,2(a4)
|
||||
805fc: 00b700a3 sb a1,1(a4)
|
||||
80600: 00b70023 sb a1,0(a4)
|
||||
80604: 00008067 ret
|
||||
80608: 0ff5f593 andi a1,a1,255
|
||||
8060c: 00859693 slli a3,a1,0x8
|
||||
80610: 00d5e5b3 or a1,a1,a3
|
||||
80614: 01059693 slli a3,a1,0x10
|
||||
80618: 00d5e5b3 or a1,a1,a3
|
||||
8061c: f6dff06f j 80588 <memset+0x18>
|
||||
80620: 00279693 slli a3,a5,0x2
|
||||
80624: 00000297 auipc t0,0x0
|
||||
80628: 005686b3 add a3,a3,t0
|
||||
8062c: 00008293 mv t0,ra
|
||||
80630: fa0680e7 jalr -96(a3)
|
||||
80634: 00028093 mv ra,t0
|
||||
80638: ff078793 addi a5,a5,-16
|
||||
8063c: 40f70733 sub a4,a4,a5
|
||||
80640: 00f60633 add a2,a2,a5
|
||||
80644: f6c378e3 bgeu t1,a2,805b4 <memset+0x44>
|
||||
80648: f3dff06f j 80584 <memset+0x14>
|
||||
|
||||
0008064c <__register_exitproc>:
|
||||
8064c: 000827b7 lui a5,0x82
|
||||
80650: cc87a703 lw a4,-824(a5) # 81cc8 <_global_impure_ptr>
|
||||
80654: 14872783 lw a5,328(a4)
|
||||
80658: 04078c63 beqz a5,806b0 <__register_exitproc+0x64>
|
||||
8065c: 0047a703 lw a4,4(a5)
|
||||
80660: 01f00813 li a6,31
|
||||
80664: 06e84e63 blt a6,a4,806e0 <__register_exitproc+0x94>
|
||||
80668: 00271813 slli a6,a4,0x2
|
||||
8066c: 02050663 beqz a0,80698 <__register_exitproc+0x4c>
|
||||
80670: 01078333 add t1,a5,a6
|
||||
80674: 08c32423 sw a2,136(t1)
|
||||
80678: 1887a883 lw a7,392(a5)
|
||||
8067c: 00100613 li a2,1
|
||||
80680: 00e61633 sll a2,a2,a4
|
||||
80684: 00c8e8b3 or a7,a7,a2
|
||||
80688: 1917a423 sw a7,392(a5)
|
||||
8068c: 10d32423 sw a3,264(t1)
|
||||
80690: 00200693 li a3,2
|
||||
80694: 02d50463 beq a0,a3,806bc <__register_exitproc+0x70>
|
||||
80698: 00170713 addi a4,a4,1
|
||||
8069c: 00e7a223 sw a4,4(a5)
|
||||
806a0: 010787b3 add a5,a5,a6
|
||||
806a4: 00b7a423 sw a1,8(a5)
|
||||
806a8: 00000513 li a0,0
|
||||
806ac: 00008067 ret
|
||||
806b0: 14c70793 addi a5,a4,332
|
||||
806b4: 14f72423 sw a5,328(a4)
|
||||
806b8: fa5ff06f j 8065c <__register_exitproc+0x10>
|
||||
806bc: 18c7a683 lw a3,396(a5)
|
||||
806c0: 00170713 addi a4,a4,1
|
||||
806c4: 00e7a223 sw a4,4(a5)
|
||||
806c8: 00c6e633 or a2,a3,a2
|
||||
806cc: 18c7a623 sw a2,396(a5)
|
||||
806d0: 010787b3 add a5,a5,a6
|
||||
806d4: 00b7a423 sw a1,8(a5)
|
||||
806d8: 00000513 li a0,0
|
||||
806dc: 00008067 ret
|
||||
806e0: fff00513 li a0,-1
|
||||
806e4: 00008067 ret
|
||||
|
||||
000806e8 <__call_exitprocs>:
|
||||
806e8: fd010113 addi sp,sp,-48
|
||||
806ec: 000827b7 lui a5,0x82
|
||||
806f0: 01412c23 sw s4,24(sp)
|
||||
806f4: cc87aa03 lw s4,-824(a5) # 81cc8 <_global_impure_ptr>
|
||||
806f8: 03212023 sw s2,32(sp)
|
||||
806fc: 02112623 sw ra,44(sp)
|
||||
80700: 148a2903 lw s2,328(s4)
|
||||
80704: 02812423 sw s0,40(sp)
|
||||
80708: 02912223 sw s1,36(sp)
|
||||
8070c: 01312e23 sw s3,28(sp)
|
||||
80710: 01512a23 sw s5,20(sp)
|
||||
80714: 01612823 sw s6,16(sp)
|
||||
80718: 01712623 sw s7,12(sp)
|
||||
8071c: 01812423 sw s8,8(sp)
|
||||
80720: 04090063 beqz s2,80760 <__call_exitprocs+0x78>
|
||||
80724: 00050b13 mv s6,a0
|
||||
80728: 00058b93 mv s7,a1
|
||||
8072c: 00100a93 li s5,1
|
||||
80730: fff00993 li s3,-1
|
||||
80734: 00492483 lw s1,4(s2)
|
||||
80738: fff48413 addi s0,s1,-1
|
||||
8073c: 02044263 bltz s0,80760 <__call_exitprocs+0x78>
|
||||
80740: 00249493 slli s1,s1,0x2
|
||||
80744: 009904b3 add s1,s2,s1
|
||||
80748: 040b8463 beqz s7,80790 <__call_exitprocs+0xa8>
|
||||
8074c: 1044a783 lw a5,260(s1)
|
||||
80750: 05778063 beq a5,s7,80790 <__call_exitprocs+0xa8>
|
||||
80754: fff40413 addi s0,s0,-1
|
||||
80758: ffc48493 addi s1,s1,-4
|
||||
8075c: ff3416e3 bne s0,s3,80748 <__call_exitprocs+0x60>
|
||||
80760: 02c12083 lw ra,44(sp)
|
||||
80764: 02812403 lw s0,40(sp)
|
||||
80768: 02412483 lw s1,36(sp)
|
||||
8076c: 02012903 lw s2,32(sp)
|
||||
80770: 01c12983 lw s3,28(sp)
|
||||
80774: 01812a03 lw s4,24(sp)
|
||||
80778: 01412a83 lw s5,20(sp)
|
||||
8077c: 01012b03 lw s6,16(sp)
|
||||
80780: 00c12b83 lw s7,12(sp)
|
||||
80784: 00812c03 lw s8,8(sp)
|
||||
80788: 03010113 addi sp,sp,48
|
||||
8078c: 00008067 ret
|
||||
80790: 00492783 lw a5,4(s2)
|
||||
80794: 0044a683 lw a3,4(s1)
|
||||
80798: fff78793 addi a5,a5,-1
|
||||
8079c: 04878e63 beq a5,s0,807f8 <__call_exitprocs+0x110>
|
||||
807a0: 0004a223 sw zero,4(s1)
|
||||
807a4: fa0688e3 beqz a3,80754 <__call_exitprocs+0x6c>
|
||||
807a8: 18892783 lw a5,392(s2)
|
||||
807ac: 008a9733 sll a4,s5,s0
|
||||
807b0: 00492c03 lw s8,4(s2)
|
||||
807b4: 00f777b3 and a5,a4,a5
|
||||
807b8: 02079263 bnez a5,807dc <__call_exitprocs+0xf4>
|
||||
807bc: 000680e7 jalr a3
|
||||
807c0: 00492703 lw a4,4(s2)
|
||||
807c4: 148a2783 lw a5,328(s4)
|
||||
807c8: 01871463 bne a4,s8,807d0 <__call_exitprocs+0xe8>
|
||||
807cc: f8f904e3 beq s2,a5,80754 <__call_exitprocs+0x6c>
|
||||
807d0: f80788e3 beqz a5,80760 <__call_exitprocs+0x78>
|
||||
807d4: 00078913 mv s2,a5
|
||||
807d8: f5dff06f j 80734 <__call_exitprocs+0x4c>
|
||||
807dc: 18c92783 lw a5,396(s2)
|
||||
807e0: 0844a583 lw a1,132(s1)
|
||||
807e4: 00f77733 and a4,a4,a5
|
||||
807e8: 00071c63 bnez a4,80800 <__call_exitprocs+0x118>
|
||||
807ec: 000b0513 mv a0,s6
|
||||
807f0: 000680e7 jalr a3
|
||||
807f4: fcdff06f j 807c0 <__call_exitprocs+0xd8>
|
||||
807f8: 00892223 sw s0,4(s2)
|
||||
807fc: fa9ff06f j 807a4 <__call_exitprocs+0xbc>
|
||||
80800: 00058513 mv a0,a1
|
||||
80804: 000680e7 jalr a3
|
||||
80808: fb9ff06f j 807c0 <__call_exitprocs+0xd8>
|
||||
|
||||
Disassembly of section .eh_frame:
|
||||
|
||||
0008080c <.eh_frame>:
|
||||
8080c: 0010 0x10
|
||||
8080e: 0000 unimp
|
||||
80810: 0000 unimp
|
||||
80812: 0000 unimp
|
||||
80814: 00527a03 0x527a03
|
||||
80818: 7c01 lui s8,0xfffe0
|
||||
8081a: 0101 addi sp,sp,0
|
||||
8081c: 00020d1b 0x20d1b
|
||||
80820: 002c addi a1,sp,8
|
||||
80822: 0000 unimp
|
||||
80824: 0018 0x18
|
||||
80826: 0000 unimp
|
||||
80828: f930 fsw fa2,112(a0)
|
||||
8082a: ffff 0xffff
|
||||
8082c: 0074 addi a3,sp,12
|
||||
8082e: 0000 unimp
|
||||
80830: 4c00 lw s0,24(s0)
|
||||
80832: 200e fld ft0,192(sp)
|
||||
80834: 9344 0x9344
|
||||
80836: 4c05 li s8,1
|
||||
80838: 0492 slli s1,s1,0x4
|
||||
8083a: 8850 0x8850
|
||||
8083c: 8902 jr s2
|
||||
8083e: 68018103 lb sp,1664(gp)
|
||||
80842: 48c1 li a7,16
|
||||
80844: 44c8 lw a0,12(s1)
|
||||
80846: 44c9 li s1,18
|
||||
80848: 44d2 lw s1,20(sp)
|
||||
8084a: 000e44d3 fadd.s fs1,ft8,ft0,rmm
|
||||
8084e: 0000 unimp
|
||||
80850: 0044 addi s1,sp,4
|
||||
80852: 0000 unimp
|
||||
80854: 0048 addi a0,sp,4
|
||||
80856: 0000 unimp
|
||||
80858: f7f8 fsw fa4,108(a5)
|
||||
8085a: ffff 0xffff
|
||||
8085c: 00f0 addi a2,sp,76
|
||||
8085e: 0000 unimp
|
||||
80860: 4400 lw s0,8(s0)
|
||||
80862: 300e fld ft0,224(sp)
|
||||
80864: 8848 0x8848
|
||||
80866: 6802 flw fa6,0(sp)
|
||||
80868: 0694 addi a3,sp,832
|
||||
8086a: 0181 addi gp,gp,0
|
||||
8086c: 0389 addi t2,t2,2
|
||||
8086e: 0492 slli s1,s1,0x4
|
||||
80870: 07950593 addi a1,a0,121
|
||||
80874: 0896 slli a7,a7,0x5
|
||||
80876: 0a980997 auipc s3,0xa980
|
||||
8087a: 8002 0x8002
|
||||
8087c: c10a sw sp,128(sp)
|
||||
8087e: c848 sw a0,20(s0)
|
||||
80880: c944 sw s1,20(a0)
|
||||
80882: d244 sw s1,36(a2)
|
||||
80884: d344 sw s1,36(a4)
|
||||
80886: d444 sw s1,44(s0)
|
||||
80888: d544 sw s1,44(a0)
|
||||
8088a: d644 sw s1,44(a2)
|
||||
8088c: d744 sw s1,44(a4)
|
||||
8088e: d844 sw s1,52(s0)
|
||||
80890: 0e48 addi a0,sp,788
|
||||
80892: 4400 lw s0,8(s0)
|
||||
80894: 0000000b 0xb
|
||||
|
||||
Disassembly of section .init_array:
|
||||
|
||||
00081898 <__init_array_start>:
|
||||
81898: 0140 addi s0,sp,132
|
||||
8189a: 0008 0x8
|
||||
|
||||
Disassembly of section .data:
|
||||
|
||||
000818a0 <impure_data>:
|
||||
818a0: 0000 unimp
|
||||
818a2: 0000 unimp
|
||||
818a4: 1b8c addi a1,sp,496
|
||||
818a6: 0008 0x8
|
||||
818a8: 1bf4 addi a3,sp,508
|
||||
818aa: 0008 0x8
|
||||
818ac: 1c5c addi a5,sp,564
|
||||
818ae: 0008 0x8
|
||||
...
|
||||
81948: 0001 nop
|
||||
8194a: 0000 unimp
|
||||
8194c: 0000 unimp
|
||||
8194e: 0000 unimp
|
||||
81950: 330e fld ft6,224(sp)
|
||||
81952: abcd j 81f44 <__BSS_END__+0x278>
|
||||
81954: 1234 addi a3,sp,296
|
||||
81956: e66d bnez a2,81a40 <impure_data+0x1a0>
|
||||
81958: deec sw a1,124(a3)
|
||||
8195a: 0005 c.nop 1
|
||||
8195c: 0000000b 0xb
|
||||
...
|
||||
|
||||
Disassembly of section .sdata:
|
||||
|
||||
00081cc8 <_global_impure_ptr>:
|
||||
81cc8: 18a0 addi s0,sp,120
|
||||
81cca: 0008 0x8
|
||||
|
||||
Disassembly of section .comment:
|
||||
|
||||
00000000 <.comment>:
|
||||
0: 3a434347 fmsub.d ft6,ft6,ft4,ft7,rmm
|
||||
4: 2820 fld fs0,80(s0)
|
||||
6: 29554e47 fmsub.s ft8,fa0,fs5,ft5,rmm
|
||||
a: 3920 fld fs0,112(a0)
|
||||
c: 322e fld ft4,232(sp)
|
||||
e: 302e fld ft0,232(sp)
|
||||
...
|
||||
|
||||
Disassembly of section .riscv.attributes:
|
||||
|
||||
00000000 <.riscv.attributes>:
|
||||
0: 2541 jal 680 <__stack_size+0x280>
|
||||
2: 0000 unimp
|
||||
4: 7200 flw fs0,32(a2)
|
||||
6: 7369 lui t1,0xffffa
|
||||
8: 01007663 bgeu zero,a6,14 <__stack_usage+0x14>
|
||||
c: 0000001b 0x1b
|
||||
10: 1004 addi s1,sp,32
|
||||
12: 7205 lui tp,0xfffe1
|
||||
14: 3376 fld ft6,376(sp)
|
||||
16: 6932 flw fs2,12(sp)
|
||||
18: 7032 flw ft0,44(sp)
|
||||
1a: 5f30 lw a2,120(a4)
|
||||
1c: 326d jal fffff9c6 <__global_pointer+0xfff7d926>
|
||||
1e: 3070 fld fa2,224(s0)
|
||||
20: 665f 7032 0030 0x307032665f
|
||||
Binary file not shown.
|
|
@ -1,210 +0,0 @@
|
|||
:0200000280007C
|
||||
:10000000970500009385451E732510FC6B10B50005
|
||||
:10001000EF00401D130510006B00050017250000C0
|
||||
:10002000130505CB17260000130686CA3306A64023
|
||||
:1000300093050000EF00C053170500001305C52706
|
||||
:10004000EF00804EEF00401DEF0080006F00004F7A
|
||||
:10005000130101FDB70708002324810203A407FF51
|
||||
:10006000232C410123261102232291022320210364
|
||||
:10007000232E3101232A51012328610123267101F6
|
||||
:100080002324810193071000130A000063D687061A
|
||||
:10009000130BE4FF930AB4FF9377EBFF130CF4FF09
|
||||
:1000A000B38AFA401304D4FF130A0000930B100024
|
||||
:1000B00063047C099307F4FF1379E4FF93041400AD
|
||||
:1000C000338927419309000013850400EF00C0081D
|
||||
:1000D0009384E4FFB389A900E39824FF9377140085
|
||||
:1000E000B38937011304E4FF330A3A01130CECFF20
|
||||
:1000F000E31054FD13741B0033048A00B707080093
|
||||
:100100008320C10223A887FE0324810283244102A5
|
||||
:10011000032901028329C101032A8101832A4101A4
|
||||
:10012000032B0101832BC100032C81001305000068
|
||||
:100130001301010367800000930910006FF09FFA1C
|
||||
:100140009307000063880700370508001305452B57
|
||||
:100150006F00803D678000009307100063D6A706FC
|
||||
:10016000130101FE232631019309E5FF2328210114
|
||||
:1001700093F7E9FF1309D5FF232C8100232A91006F
|
||||
:10018000232E11009304F5FF3309F94013040000F6
|
||||
:1001900013850400EFF05FFC9384E4FF3304A400B4
|
||||
:1001A000E39824FF13F519008320C101330585006E
|
||||
:1001B0000324810183244101032901018329C10012
|
||||
:1001C00013010102678000006780000063060500DC
|
||||
:1001D0009301050073000000EF0080131305000079
|
||||
:1001E0006B0005001305F0FF6B0005009721000070
|
||||
:1001F000938141EB37F10F00732610CC9315A600C5
|
||||
:100200003301B140F32630CC6386060013050000AD
|
||||
:100210006B00050067800000130101FF23248100AB
|
||||
:1002200023202101372408003729080093078489F7
|
||||
:10023000130989893309F9402326110023229100EB
|
||||
:1002400013592940630009021304848993040000B0
|
||||
:10025000832704009384140013044400E7800700FC
|
||||
:10026000E31899FE3724080037290800930784898A
|
||||
:100270001309C9893309F940135929406300090258
|
||||
:1002800013048489930400008327040093841400DA
|
||||
:1002900013044400E7800700E31899FE8320C1009F
|
||||
:1002A000032481008324410003290100130101017B
|
||||
:1002B00067800000130101FF23248100B727080095
|
||||
:1002C000372408001304C4899387C789B3878740FC
|
||||
:1002D000232291002326110093D427406380040237
|
||||
:1002E0009387C7FF33848700832704009384F4FF38
|
||||
:1002F0001304C4FFE7800700E39804FE8320C100D5
|
||||
:100300000324810083244100130101016780000060
|
||||
:10031000F32750CC37170000130707FFB387E70018
|
||||
:1003200093978700732700B023A0E700732710B0CE
|
||||
:1003300023A2E700732720B023A4E700732730B07F
|
||||
:1003400023A6E700732740B023A8E700732750B027
|
||||
:1003500023AAE700732760B023ACE700732770B0CF
|
||||
:1003600023AEE700732780B023A0E702732790B085
|
||||
:1003700023A2E7027327A0B023A4E7027327B0B03B
|
||||
:1003800023A6E7027327C0B023A8E7027327D0B0E3
|
||||
:1003900023AAE7027327E0B023ACE7027327F0B08B
|
||||
:1003A00023AEE702732700B123A0E704732710B13F
|
||||
:1003B00023A2E704732720B123A4E704732730B1F5
|
||||
:1003C00023A6E704732740B123A8E704732750B19D
|
||||
:1003D00023AAE704732760B123ACE704732770B145
|
||||
:1003E00023AEE704732780B123A0E706732790B1FB
|
||||
:1003F00023A2E7067327A0B123A4E7067327B0B1B1
|
||||
:1004000023A6E7067327C0B123A8E7067327D0B158
|
||||
:1004100023AAE7067327E0B123ACE7067327F0B100
|
||||
:1004200023AEE706732700B823A0E708732710B8A8
|
||||
:1004300023A2E708732720B823A4E708732730B85E
|
||||
:1004400023A6E708732740B823A8E708732750B806
|
||||
:1004500023AAE708732760B823ACE708732770B8AE
|
||||
:1004600023AEE708732780B823A0E70A732790B864
|
||||
:1004700023A2E70A7327A0B823A4E70A7327B0B81A
|
||||
:1004800023A6E70A7327C0B823A8E70A7327D0B8C2
|
||||
:1004900023AAE70A7327E0B823ACE70A7327F0B86A
|
||||
:1004A00023AEE70A732700B923A0E70C732710B91E
|
||||
:1004B00023A2E70C732720B923A4E70C732730B9D4
|
||||
:1004C00023A6E70C732740B923A8E70C732750B97C
|
||||
:1004D00023AAE70C732760B923ACE70C732770B924
|
||||
:1004E00023AEE70C732780B923A0E70E732790B9DA
|
||||
:1004F00023A2E70E7327A0B923A4E70E7327B0B990
|
||||
:1005000023A6E70E7327C0B923A8E70E7327D0B937
|
||||
:1005100023AAE70E7327E0B923ACE70E7327F0B9DF
|
||||
:1005200023AEE70E678000009305050093060000E8
|
||||
:1005300013060000130500006F004011130101FFB6
|
||||
:1005400093050000232481002326110013040500D5
|
||||
:10055000EF008019B727080003A587CC8327C503C0
|
||||
:1005600063840700E780070013050400EFF01FC64F
|
||||
:100570001303F00013070500637EC3029377F700AF
|
||||
:100580006390070A63920508937606FF1376F600D8
|
||||
:10059000B386E6002320B7002322B7002324B70048
|
||||
:1005A0002326B70013070701E366D7FE631406008E
|
||||
:1005B00067800000B306C3409396260097020000B0
|
||||
:1005C000B38656006780C6002307B700A306B700AE
|
||||
:1005D0002306B700A305B7002305B700A304B7009F
|
||||
:1005E0002304B700A303B7002303B700A302B70097
|
||||
:1005F0002302B700A301B7002301B700A300B7008F
|
||||
:100600002300B7006780000093F5F50F93968500EF
|
||||
:10061000B3E5D50093960501B3E5D5006FF0DFF69D
|
||||
:100620009396270097020000B3865600938200003D
|
||||
:10063000E78006FA93800200938707FF3307F740AD
|
||||
:100640003306F600E378C3F66FF0DFF3B727080050
|
||||
:1006500003A787CC83278714638C070403A747006D
|
||||
:100660001308F001634EE80613182700630605021D
|
||||
:10067000338307012324C30883A8871813061000B7
|
||||
:100680003316E600B3E8C80023A417192324D310B7
|
||||
:10069000930620006304D5021307170023A2E70086
|
||||
:1006A000B387070123A4B70013050000678000008B
|
||||
:1006B0009307C7142324F7146FF05FFA83A6C718B3
|
||||
:1006C0001307170023A2E70033E6C60023A6C718C6
|
||||
:1006D000B387070123A4B70013050000678000005B
|
||||
:1006E0001305F0FF67800000130101FDB727080024
|
||||
:1006F000232C410103AA87CC2320210323261102A6
|
||||
:1007000003298A142324810223229102232E3101FA
|
||||
:10071000232A510123286101232671012324810109
|
||||
:1007200063000904130B0500938B0500930A100066
|
||||
:100730009309F0FF832449001384F4FF6342040209
|
||||
:1007400093942400B304990063840B0483A744109A
|
||||
:10075000638077051304F4FF9384C4FFE31634FF2A
|
||||
:100760008320C10203248102832441020329010260
|
||||
:100770008329C101032A8101832A4101032B01013D
|
||||
:10078000832BC100032C810013010103678000004B
|
||||
:100790008327490083A644009387F7FF638E87046D
|
||||
:1007A00023A20400E38806FA8327891833978A0076
|
||||
:1007B000032C4900B377F70063920702E780060035
|
||||
:1007C0000327490083278A1463148701E304F9F897
|
||||
:1007D000E38807F8138907006FF0DFF58327C9184E
|
||||
:1007E00083A544083377F700631C070013050B004B
|
||||
:1007F000E78006006FF0DFFC232289006FF09FFA8C
|
||||
:0C08000013850500E78006006FF09FFBE9
|
||||
:10080C001000000000000000037A5200017C01017E
|
||||
:10081C001B0D02002C0000001800000030F9FFFF37
|
||||
:10082C0074000000004C0E204493054C9204508838
|
||||
:10083C00028903810168C148C844C944D244D344E5
|
||||
:10084C000E0000004400000048000000F8F7FFFF15
|
||||
:10085C00F000000000440E304888026894068101C4
|
||||
:10086C00890392049305950796089709980A0280C4
|
||||
:10087C000AC148C844C944D244D344D444D544D60C
|
||||
:0C088C0044D744D8480E00440B00000084
|
||||
:041898004001080003
|
||||
:1018A000000000008C1B0800F41B08005C1C0800F2
|
||||
:1018B0000000000000000000000000000000000028
|
||||
:1018C0000000000000000000000000000000000018
|
||||
:1018D0000000000000000000000000000000000008
|
||||
:1018E00000000000000000000000000000000000F8
|
||||
:1018F00000000000000000000000000000000000E8
|
||||
:1019000000000000000000000000000000000000D7
|
||||
:1019100000000000000000000000000000000000C7
|
||||
:1019200000000000000000000000000000000000B7
|
||||
:1019300000000000000000000000000000000000A7
|
||||
:101940000000000000000000010000000000000096
|
||||
:101950000E33CDAB34126DE6ECDE05000B0000005B
|
||||
:101960000000000000000000000000000000000077
|
||||
:101970000000000000000000000000000000000067
|
||||
:101980000000000000000000000000000000000057
|
||||
:101990000000000000000000000000000000000047
|
||||
:1019A0000000000000000000000000000000000037
|
||||
:1019B0000000000000000000000000000000000027
|
||||
:1019C0000000000000000000000000000000000017
|
||||
:1019D0000000000000000000000000000000000007
|
||||
:1019E00000000000000000000000000000000000F7
|
||||
:1019F00000000000000000000000000000000000E7
|
||||
:101A000000000000000000000000000000000000D6
|
||||
:101A100000000000000000000000000000000000C6
|
||||
:101A200000000000000000000000000000000000B6
|
||||
:101A300000000000000000000000000000000000A6
|
||||
:101A40000000000000000000000000000000000096
|
||||
:101A50000000000000000000000000000000000086
|
||||
:101A60000000000000000000000000000000000076
|
||||
:101A70000000000000000000000000000000000066
|
||||
:101A80000000000000000000000000000000000056
|
||||
:101A90000000000000000000000000000000000046
|
||||
:101AA0000000000000000000000000000000000036
|
||||
:101AB0000000000000000000000000000000000026
|
||||
:101AC0000000000000000000000000000000000016
|
||||
:101AD0000000000000000000000000000000000006
|
||||
:101AE00000000000000000000000000000000000F6
|
||||
:101AF00000000000000000000000000000000000E6
|
||||
:101B000000000000000000000000000000000000D5
|
||||
:101B100000000000000000000000000000000000C5
|
||||
:101B200000000000000000000000000000000000B5
|
||||
:101B300000000000000000000000000000000000A5
|
||||
:101B40000000000000000000000000000000000095
|
||||
:101B50000000000000000000000000000000000085
|
||||
:101B60000000000000000000000000000000000075
|
||||
:101B70000000000000000000000000000000000065
|
||||
:101B80000000000000000000000000000000000055
|
||||
:101B90000000000000000000000000000000000045
|
||||
:101BA0000000000000000000000000000000000035
|
||||
:101BB0000000000000000000000000000000000025
|
||||
:101BC0000000000000000000000000000000000015
|
||||
:101BD0000000000000000000000000000000000005
|
||||
:101BE00000000000000000000000000000000000F5
|
||||
:101BF00000000000000000000000000000000000E5
|
||||
:101C000000000000000000000000000000000000D4
|
||||
:101C100000000000000000000000000000000000C4
|
||||
:101C200000000000000000000000000000000000B4
|
||||
:101C300000000000000000000000000000000000A4
|
||||
:101C40000000000000000000000000000000000094
|
||||
:101C50000000000000000000000000000000000084
|
||||
:101C60000000000000000000000000000000000074
|
||||
:101C70000000000000000000000000000000000064
|
||||
:101C80000000000000000000000000000000000054
|
||||
:101C90000000000000000000000000000000000044
|
||||
:101CA0000000000000000000000000000000000034
|
||||
:101CB0000000000000000000000000000000000024
|
||||
:081CC00000000000000000001C
|
||||
:041CC800A018080058
|
||||
:040000038000000079
|
||||
:00000001FF
|
||||
|
|
@ -421,6 +421,10 @@ if { $bCheckIPs == 1 } {
|
|||
set_property -dict [ list \
|
||||
CONFIG.POLARITY {ACTIVE_HIGH} \
|
||||
] $vx_reset
|
||||
|
||||
set dcr_wr_valid [ create_bd_port -dir I dcr_wr_valid ]
|
||||
set dcr_wr_addr [ create_bd_port -dir I -from 11 -to 0 dcr_wr_addr ]
|
||||
set dcr_wr_data [ create_bd_port -dir I -from 31 -to 0 dcr_wr_data ]
|
||||
|
||||
# Create instance: Vortex_axi_wrapper_0, and set properties
|
||||
set block_name Vortex_axi_wrapper
|
||||
|
|
@ -468,7 +472,7 @@ if { $bCheckIPs == 1 } {
|
|||
] $axi_bram_ctrl_0_bram
|
||||
|
||||
# Create interface connections
|
||||
connect_bd_intf_net -intf_net Vortex_axi_wrapper_0_m_axi [get_bd_intf_pins Vortex_axi_wrapper_0/m_axi] [get_bd_intf_pins axi_bram_ctrl_0/S_AXI]
|
||||
connect_bd_intf_net -intf_net Vortex_axi_wrapper_0_m_axi_mem [get_bd_intf_pins Vortex_axi_wrapper_0/m_axi_mem] [get_bd_intf_pins axi_bram_ctrl_0/S_AXI]
|
||||
connect_bd_intf_net -intf_net axi_bram_ctrl_0_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_0/BRAM_PORTA] [get_bd_intf_pins axi_bram_ctrl_0_bram/BRAM_PORTA]
|
||||
connect_bd_intf_net -intf_net axi_bram_ctrl_0_BRAM_PORTB [get_bd_intf_pins axi_bram_ctrl_0/BRAM_PORTB] [get_bd_intf_pins axi_bram_ctrl_0_bram/BRAM_PORTB]
|
||||
|
||||
|
|
@ -477,9 +481,12 @@ if { $bCheckIPs == 1 } {
|
|||
connect_bd_net -net clk_wiz_clk_out1 [get_bd_ports clk_100MHz] [get_bd_pins Vortex_axi_wrapper_0/clk] [get_bd_pins axi_bram_ctrl_0/s_axi_aclk]
|
||||
connect_bd_net -net resetn_1 [get_bd_ports resetn] [get_bd_pins axi_bram_ctrl_0/s_axi_aresetn]
|
||||
connect_bd_net -net vx_reset_1 [get_bd_ports vx_reset] [get_bd_pins Vortex_axi_wrapper_0/reset]
|
||||
connect_bd_net -net dcr_wr_valid_1 [get_bd_ports dcr_wr_valid] [get_bd_pins Vortex_axi_wrapper_0/dcr_wr_valid]
|
||||
connect_bd_net -net dcr_wr_addr_1 [get_bd_ports dcr_wr_addr] [get_bd_pins Vortex_axi_wrapper_0/dcr_wr_addr]
|
||||
connect_bd_net -net dcr_wr_data_1 [get_bd_ports dcr_wr_data] [get_bd_pins Vortex_axi_wrapper_0/dcr_wr_data]
|
||||
|
||||
# Create address segments
|
||||
assign_bd_address -offset 0x00000000 -range 0x00100000 -target_address_space [get_bd_addr_spaces Vortex_axi_wrapper_0/m_axi] [get_bd_addr_segs axi_bram_ctrl_0/S_AXI/Mem0] -force
|
||||
assign_bd_address -offset 0x00000000 -range 0x00100000 -target_address_space [get_bd_addr_spaces Vortex_axi_wrapper_0/m_axi_mem] [get_bd_addr_segs axi_bram_ctrl_0/S_AXI/Mem0] -force
|
||||
|
||||
# Perform GUI Layout
|
||||
regenerate_bd_layout -layout_string {
|
||||
|
|
@ -489,22 +496,28 @@ if { $bCheckIPs == 1 } {
|
|||
"ExpandedHierarchyInLayout":"",
|
||||
"guistr":"# # String gsaved with Nlview 7.0r4 2019-12-20 bk=1.5203 VDI=41 GEI=36 GUI=JA:10.0 TLS
|
||||
# -string -flagsOSRD
|
||||
preplace port vx_busy -pg 1 -lvl 4 -x 830 -y 160 -defaultsOSRD
|
||||
preplace port clk_100MHz -pg 1 -lvl 0 -x 0 -y 60 -defaultsOSRD
|
||||
preplace port resetn -pg 1 -lvl 0 -x 0 -y 150 -defaultsOSRD
|
||||
preplace port vx_reset -pg 1 -lvl 0 -x 0 -y 80 -defaultsOSRD
|
||||
preplace inst axi_bram_ctrl_0 -pg 1 -lvl 2 -x 400 -y 80 -defaultsOSRD
|
||||
preplace inst Vortex_axi_wrapper_0 -pg 1 -lvl 1 -x 130 -y 70 -defaultsOSRD
|
||||
preplace inst axi_bram_ctrl_0_bram -pg 1 -lvl 3 -x 680 -y 80 -defaultsOSRD
|
||||
preplace netloc Vortex_axi_wrapper_0_busy 1 1 3 240J 160 NJ 160 NJ
|
||||
preplace netloc vx_reset_1 1 0 1 NJ 80
|
||||
preplace netloc clk_wiz_clk_out1 1 0 2 20 140 250J
|
||||
preplace netloc resetn_1 1 0 2 NJ 150 260J
|
||||
preplace netloc axi_bram_ctrl_0_BRAM_PORTA 1 2 1 N 70
|
||||
preplace netloc axi_bram_ctrl_0_BRAM_PORTB 1 2 1 N 90
|
||||
preplace netloc Vortex_axi_wrapper_0_m_axi 1 1 1 N 60
|
||||
levelinfo -pg 1 0 130 400 680 830
|
||||
pagesize -pg 1 -db -bbox -sgen -140 0 940 180
|
||||
preplace port clk_100MHz -pg 1 -lvl 0 -x 0 -y 40 -defaultsOSRD
|
||||
preplace port resetn -pg 1 -lvl 0 -x 0 -y 20 -defaultsOSRD
|
||||
preplace port vx_busy -pg 1 -lvl 4 -x 950 -y 220 -defaultsOSRD
|
||||
preplace port vx_reset -pg 1 -lvl 0 -x 0 -y 110 -defaultsOSRD
|
||||
preplace port dcr_wr_valid -pg 1 -lvl 0 -x 0 -y 130 -defaultsOSRD
|
||||
preplace portBus dcr_wr_addr -pg 1 -lvl 0 -x 0 -y 150 -defaultsOSRD
|
||||
preplace portBus dcr_wr_data -pg 1 -lvl 0 -x 0 -y 170 -defaultsOSRD
|
||||
preplace inst Vortex_axi_wrapper_0 -pg 1 -lvl 1 -x 190 -y 130 -defaultsOSRD
|
||||
preplace inst axi_bram_ctrl_0 -pg 1 -lvl 2 -x 520 -y 140 -defaultsOSRD
|
||||
preplace inst axi_bram_ctrl_0_bram -pg 1 -lvl 3 -x 800 -y 140 -defaultsOSRD
|
||||
preplace netloc Vortex_axi_wrapper_0_busy 1 1 3 360J 220 NJ 220 NJ
|
||||
preplace netloc clk_wiz_clk_out1 1 0 2 20 30 370
|
||||
preplace netloc resetn_1 1 0 2 NJ 20 380J
|
||||
preplace netloc vx_reset_1 1 0 1 NJ 110
|
||||
preplace netloc dcr_wr_valid_1 1 0 1 NJ 130
|
||||
preplace netloc dcr_wr_addr_1 1 0 1 NJ 150
|
||||
preplace netloc dcr_wr_data_1 1 0 1 NJ 170
|
||||
preplace netloc axi_bram_ctrl_0_BRAM_PORTB 1 2 1 N 150
|
||||
preplace netloc axi_bram_ctrl_0_BRAM_PORTA 1 2 1 N 130
|
||||
preplace netloc Vortex_axi_wrapper_0_m_axi_mem 1 1 1 N 120
|
||||
levelinfo -pg 1 0 190 520 800 950
|
||||
pagesize -pg 1 -db -bbox -sgen -180 0 1060 240
|
||||
"
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1,95 +1,114 @@
|
|||
`include "VX_define.vh"
|
||||
|
||||
module Vortex_axi_wrapper #(
|
||||
parameter AXI_DATA_WIDTH = 512,
|
||||
parameter AXI_ADDR_WIDTH = 32,
|
||||
parameter AXI_TID_WIDTH = 16
|
||||
parameter C_M_AXI_GMEM_DATA_WIDTH = 512,
|
||||
parameter C_M_AXI_GMEM_ADDR_WIDTH = 32,
|
||||
parameter C_M_AXI_GMEM_ID_WIDTH = 16
|
||||
) (
|
||||
input wire clk,
|
||||
input wire reset,
|
||||
output wire [AXI_TID_WIDTH - 1:0] m_axi_awid,
|
||||
output wire [AXI_ADDR_WIDTH - 1:0] m_axi_awaddr,
|
||||
output wire [7:0] m_axi_awlen,
|
||||
output wire [2:0] m_axi_awsize,
|
||||
output wire [1:0] m_axi_awburst,
|
||||
output wire m_axi_awlock,
|
||||
output wire [3:0] m_axi_awcache,
|
||||
output wire [2:0] m_axi_awprot,
|
||||
output wire [3:0] m_axi_awqos,
|
||||
output wire m_axi_awvalid,
|
||||
input wire m_axi_awready,
|
||||
output wire [AXI_DATA_WIDTH - 1:0] m_axi_wdata,
|
||||
output wire [AXI_DATA_WIDTH/8 - 1:0] m_axi_wstrb,
|
||||
output wire m_axi_wlast,
|
||||
output wire m_axi_wvalid,
|
||||
input wire m_axi_wready,
|
||||
input wire [AXI_TID_WIDTH - 1:0] m_axi_bid,
|
||||
input wire [1:0] m_axi_bresp,
|
||||
input wire m_axi_bvalid,
|
||||
output wire m_axi_bready,
|
||||
output wire [AXI_TID_WIDTH - 1:0] m_axi_arid,
|
||||
output wire [AXI_ADDR_WIDTH - 1:0] m_axi_araddr,
|
||||
output wire [7:0] m_axi_arlen,
|
||||
output wire [2:0] m_axi_arsize,
|
||||
output wire [1:0] m_axi_arburst,
|
||||
output wire m_axi_arlock,
|
||||
output wire [3:0] m_axi_arcache,
|
||||
output wire [2:0] m_axi_arprot,
|
||||
output wire [3:0] m_axi_arqos,
|
||||
output wire m_axi_arvalid,
|
||||
input wire m_axi_arready,
|
||||
input wire [AXI_TID_WIDTH - 1:0] m_axi_rid,
|
||||
input wire [AXI_DATA_WIDTH - 1:0] m_axi_rdata,
|
||||
input wire [1:0] m_axi_rresp,
|
||||
input wire m_axi_rlast,
|
||||
input wire m_axi_rvalid,
|
||||
output wire m_axi_rready,
|
||||
output wire busy
|
||||
input wire clk,
|
||||
input wire reset,
|
||||
|
||||
// AXI4 memory interface
|
||||
output wire m_axi_mem_awvalid,
|
||||
input wire m_axi_mem_awready,
|
||||
output wire [C_M_AXI_GMEM_ADDR_WIDTH-1:0] m_axi_mem_awaddr,
|
||||
output wire [C_M_AXI_GMEM_ID_WIDTH - 1:0] m_axi_mem_awid,
|
||||
output wire [7:0] m_axi_mem_awlen,
|
||||
output wire [2:0] m_axi_mem_awsize,
|
||||
output wire [1:0] m_axi_mem_awburst,
|
||||
output wire [1:0] m_axi_mem_awlock,
|
||||
output wire [3:0] m_axi_mem_awcache,
|
||||
output wire [2:0] m_axi_mem_awprot,
|
||||
output wire [3:0] m_axi_mem_awqos,
|
||||
output wire m_axi_mem_wvalid,
|
||||
input wire m_axi_mem_wready,
|
||||
output wire [C_M_AXI_GMEM_DATA_WIDTH-1:0] m_axi_mem_wdata,
|
||||
output wire [C_M_AXI_GMEM_DATA_WIDTH/8-1:0] m_axi_mem_wstrb,
|
||||
output wire m_axi_mem_wlast,
|
||||
output wire m_axi_mem_arvalid,
|
||||
input wire m_axi_mem_arready,
|
||||
output wire [C_M_AXI_GMEM_ADDR_WIDTH-1:0] m_axi_mem_araddr,
|
||||
output wire [C_M_AXI_GMEM_ID_WIDTH-1:0] m_axi_mem_arid,
|
||||
output wire [7:0] m_axi_mem_arlen,
|
||||
output wire [2:0] m_axi_mem_arsize,
|
||||
output wire [1:0] m_axi_mem_arburst,
|
||||
output wire [1:0] m_axi_mem_arlock,
|
||||
output wire [3:0] m_axi_mem_arcache,
|
||||
output wire [2:0] m_axi_mem_arprot,
|
||||
output wire [3:0] m_axi_mem_arqos,
|
||||
input wire m_axi_mem_rvalid,
|
||||
output wire m_axi_mem_rready,
|
||||
input wire [C_M_AXI_GMEM_DATA_WIDTH - 1:0] m_axi_mem_rdata,
|
||||
input wire m_axi_mem_rlast,
|
||||
input wire [C_M_AXI_GMEM_ID_WIDTH - 1:0] m_axi_mem_rid,
|
||||
input wire [1:0] m_axi_mem_rresp,
|
||||
input wire m_axi_mem_bvalid,
|
||||
output wire m_axi_mem_bready,
|
||||
input wire [1:0] m_axi_mem_bresp,
|
||||
input wire [C_M_AXI_GMEM_ID_WIDTH - 1:0] m_axi_mem_bid,
|
||||
|
||||
input wire dcr_wr_valid,
|
||||
input wire [`VX_DCR_ADDR_WIDTH-1:0] dcr_wr_addr,
|
||||
input wire [`VX_DCR_DATA_WIDTH-1:0] dcr_wr_data,
|
||||
|
||||
output wire busy
|
||||
);
|
||||
|
||||
Vortex_axi #(
|
||||
.AXI_DATA_WIDTH (AXI_DATA_WIDTH),
|
||||
.AXI_ADDR_WIDTH (AXI_ADDR_WIDTH),
|
||||
.AXI_TID_WIDTH (AXI_TID_WIDTH)
|
||||
.AXI_DATA_WIDTH (C_M_AXI_GMEM_DATA_WIDTH),
|
||||
.AXI_ADDR_WIDTH (C_M_AXI_GMEM_ADDR_WIDTH),
|
||||
.AXI_TID_WIDTH (C_M_AXI_GMEM_ID_WIDTH)
|
||||
) inst (
|
||||
.clk(clk),
|
||||
.reset(reset),
|
||||
.m_axi_awid(m_axi_awid),
|
||||
.m_axi_awaddr(m_axi_awaddr),
|
||||
.m_axi_awlen(m_axi_awlen),
|
||||
.m_axi_awsize(m_axi_awsize),
|
||||
.m_axi_awburst(m_axi_awburst),
|
||||
.m_axi_awlock(m_axi_awlock),
|
||||
.m_axi_awcache(m_axi_awcache),
|
||||
.m_axi_awprot(m_axi_awprot),
|
||||
.m_axi_awqos(m_axi_awqos),
|
||||
.m_axi_awvalid(m_axi_awvalid),
|
||||
.m_axi_awready(m_axi_awready),
|
||||
.m_axi_wdata(m_axi_wdata),
|
||||
.m_axi_wstrb(m_axi_wstrb),
|
||||
.m_axi_wlast(m_axi_wlast),
|
||||
.m_axi_wvalid(m_axi_wvalid),
|
||||
.m_axi_wready(m_axi_wready),
|
||||
.m_axi_bid(m_axi_bid),
|
||||
.m_axi_bresp(m_axi_bresp),
|
||||
.m_axi_bvalid(m_axi_bvalid),
|
||||
.m_axi_bready(m_axi_bready),
|
||||
.m_axi_arid(m_axi_arid),
|
||||
.m_axi_araddr(m_axi_araddr),
|
||||
.m_axi_arlen(m_axi_arlen),
|
||||
.m_axi_arsize(m_axi_arsize),
|
||||
.m_axi_arburst(m_axi_arburst),
|
||||
.m_axi_arlock(m_axi_arlock),
|
||||
.m_axi_arcache(m_axi_arcache),
|
||||
.m_axi_arprot(m_axi_arprot),
|
||||
.m_axi_arqos(m_axi_arqos),
|
||||
.m_axi_arvalid(m_axi_arvalid),
|
||||
.m_axi_arready(m_axi_arready),
|
||||
.m_axi_rid(m_axi_rid),
|
||||
.m_axi_rdata(m_axi_rdata),
|
||||
.m_axi_rresp(m_axi_rresp),
|
||||
.m_axi_rlast(m_axi_rlast),
|
||||
.m_axi_rvalid(m_axi_rvalid),
|
||||
.m_axi_rready(m_axi_rready),
|
||||
.busy(busy)
|
||||
.clk (clk),
|
||||
.reset (reset),
|
||||
|
||||
.m_axi_awvalid (m_axi_mem_awvalid),
|
||||
.m_axi_awready (m_axi_mem_awready),
|
||||
.m_axi_awaddr (m_axi_mem_awaddr),
|
||||
.m_axi_awid (m_axi_mem_awid),
|
||||
.m_axi_awlen (m_axi_mem_awlen),
|
||||
.m_axi_awsize (m_axi_mem_awsize),
|
||||
.m_axi_awburst (m_axi_mem_awburst),
|
||||
.m_axi_awlock (m_axi_mem_awlock),
|
||||
.m_axi_awcache (m_axi_mem_awcache),
|
||||
.m_axi_awprot (m_axi_mem_awprot),
|
||||
.m_axi_awqos (m_axi_mem_awqos),
|
||||
|
||||
.m_axi_wvalid (m_axi_mem_wvalid),
|
||||
.m_axi_wready (m_axi_mem_wready),
|
||||
.m_axi_wdata (m_axi_mem_wdata),
|
||||
.m_axi_wstrb (m_axi_mem_wstrb),
|
||||
.m_axi_wlast (m_axi_mem_wlast),
|
||||
|
||||
.m_axi_bvalid (m_axi_mem_bvalid),
|
||||
.m_axi_bready (m_axi_mem_bready),
|
||||
.m_axi_bid (m_axi_mem_bid),
|
||||
.m_axi_bresp (m_axi_mem_bresp),
|
||||
|
||||
.m_axi_arvalid (m_axi_mem_arvalid),
|
||||
.m_axi_arready (m_axi_mem_arready),
|
||||
.m_axi_araddr (m_axi_mem_araddr),
|
||||
.m_axi_arid (m_axi_mem_arid),
|
||||
.m_axi_arlen (m_axi_mem_arlen),
|
||||
.m_axi_arsize (m_axi_mem_arsize),
|
||||
.m_axi_arburst (m_axi_mem_arburst),
|
||||
.m_axi_arlock (m_axi_mem_arlock),
|
||||
.m_axi_arcache (m_axi_mem_arcache),
|
||||
.m_axi_arprot (m_axi_mem_arprot),
|
||||
.m_axi_arqos (m_axi_mem_arqos),
|
||||
|
||||
.m_axi_rvalid (m_axi_mem_rvalid),
|
||||
.m_axi_rready (m_axi_mem_rready),
|
||||
.m_axi_rdata (m_axi_mem_rdata),
|
||||
.m_axi_rid (m_axi_mem_rid),
|
||||
.m_axi_rresp (m_axi_mem_rresp),
|
||||
.m_axi_rlast (m_axi_mem_rlast),
|
||||
|
||||
.dcr_wr_valid (dcr_wr_valid),
|
||||
.dcr_wr_addr (dcr_wr_addr),
|
||||
.dcr_wr_data (dcr_wr_data),
|
||||
|
||||
.busy (busy)
|
||||
);
|
||||
|
||||
endmodule
|
||||
|
|
@ -7,12 +7,13 @@
|
|||
`define VIVADO
|
||||
`define NOGLOBALS
|
||||
|
||||
`define NUM_CORES 1
|
||||
`define NUM_THREADS 2
|
||||
`define NUM_WARPS 2
|
||||
`define STARTUP_ADDR 32'h80000
|
||||
`define STARTUP_ADDR 32'h80000
|
||||
`define IO_BASE_ADDR 32'hFF000
|
||||
`define IO_ADDR_SIZE (32'hFFFFF - `IO_BASE_ADDR + 1)
|
||||
`define IO_COUT_ADDR (32'hFFFFF - `MEM_BLOCK_SIZE + 1)
|
||||
|
||||
`define NUM_CORES 1
|
||||
`define NUM_THREADS 2
|
||||
`define NUM_WARPS 2
|
||||
|
||||
`endif
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -2,41 +2,53 @@
|
|||
|
||||
module testbench;
|
||||
// Inpput signals
|
||||
reg clk_r;
|
||||
reg resetn_r;
|
||||
reg vx_reset_r;
|
||||
wire vx_busy_w;
|
||||
reg clk;
|
||||
reg resetn;
|
||||
reg vx_reset;
|
||||
wire vx_busy;
|
||||
reg dcr_wr_valid;
|
||||
reg [11:0] dcr_wr_addr;
|
||||
reg [31:0] dcr_wr_data;
|
||||
|
||||
design_1_wrapper UUD(
|
||||
.clk_100MHz(clk_r),
|
||||
.resetn(resetn_r),
|
||||
.vx_reset(vx_reset_r),
|
||||
.vx_busy(vx_busy_w)
|
||||
.clk_100MHz (clk),
|
||||
.resetn (resetn),
|
||||
.vx_reset (vx_reset),
|
||||
.dcr_wr_valid (dcr_wr_valid),
|
||||
.dcr_wr_addr (dcr_wr_addr),
|
||||
.dcr_wr_data (dcr_wr_data),
|
||||
.vx_busy (vx_busy)
|
||||
);
|
||||
|
||||
// clock signal creation
|
||||
always begin
|
||||
clk_r = 1'b0;
|
||||
clk = 1'b0;
|
||||
#1;
|
||||
clk_r = 1'b1;
|
||||
clk = 1'b1;
|
||||
#1;
|
||||
end
|
||||
|
||||
initial begin
|
||||
#2;
|
||||
resetn_r = 1'b0;
|
||||
vx_reset_r = 1'b0;
|
||||
resetn = 1'b0;
|
||||
vx_reset = 1'b1;
|
||||
dcr_wr_valid = 1'b0;
|
||||
#2;
|
||||
resetn_r = 1'b1;
|
||||
resetn = 1'b1;
|
||||
#2;
|
||||
vx_reset_r = 1'b1;
|
||||
dcr_wr_valid = 1'b1;
|
||||
dcr_wr_addr = `DCR_BASE_STARTUP_ADDR;
|
||||
dcr_wr_data = `STARTUP_ADDR;
|
||||
#2;
|
||||
dcr_wr_valid = 1'b0;
|
||||
#20;
|
||||
vx_reset_r = 1'b0;
|
||||
vx_reset = 1'b0;
|
||||
end
|
||||
|
||||
always @(posedge clk_r) begin
|
||||
if (resetn_r && !vx_busy_w) begin
|
||||
always @(posedge clk) begin
|
||||
if (resetn && ~vx_reset && ~vx_busy) begin
|
||||
$display("done!");
|
||||
$finish;
|
||||
end
|
||||
end
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue