save work before pull

.travis.yml

@@ -99,4 +99,20 @@ jobs:
       env: XLEN=32
       script:
         - ./ci/travis_run.py ./ci/regression.sh --debug
-        - ./ci/travis_run.py ./ci/regression.sh --stress
+        - ./ci/travis_run.py ./ci/regression.sh --stress
+
+    - stage: test
+      name: virtual_memory
+      env: XLEN=32 
+      env: VM_DISABLE=1
+      script:
+        - ./ci/travis_run.py ./ci/regression.sh --regression
+        - ./ci/travis_run.py ./ci/regression.sh --opencl
+    
+    - stage: test
+      name: virtual_memory
+      env: XLEN=64
+      env: VM_DISABLE=1
+      script:
+        - ./ci/travis_run.py ./ci/regression.sh --regression
+        - ./ci/travis_run.py ./ci/regression.sh --opencl

ci/regression.sh.in

@@ -19,6 +19,8 @@ set -e
 # clear blackbox cache
 rm -f blackbox.*.cache
 
+# HW: add a test "VM Test" to make sure VM feature is enabled
+
 XLEN=${XLEN:=@XLEN@}
 
 echo "Vortex Regression Test: XLEN=$XLEN"

runtime/include/vortex.h

@@ -65,6 +65,7 @@ typedef void* vx_buffer_h;
 #define VX_MEM_READ                 0x1
 #define VX_MEM_WRITE                0x2
 #define VX_MEM_READ_WRITE           0x3
+#define VX_MEM_PIN_MEMORY           0x4
 
 // open the device and connect to it
 int vx_dev_open(vx_device_h* hdevice);

runtime/simx/vortex.cpp

@@ -199,6 +199,7 @@ public:
     uint64_t addr = 0;
 
     DBGPRINT("[RT:mem_alloc] size: 0x%lx, asize, 0x%lx,flag : 0x%d\n", size, asize, flags);
+    // HW: when vm is supported this global_mem_ should be virtual memory allocator
     CHECK_ERR(global_mem_.allocate(asize, &addr), {
       return err;
     });
@@ -231,7 +232,7 @@ public:
   int mem_free(uint64_t dev_addr)
   {
 #ifdef VM_ENABLE
-    uint64_t paddr= page_table_walk(dev_addr);
+    uint64_t paddr = page_table_walk(dev_addr);
     return global_mem_.release(paddr);
 #else
     return global_mem_.release(dev_addr);
@@ -264,6 +265,14 @@ public:
       return -1;
 #ifdef VM_ENABLE
     uint64_t pAddr = page_table_walk(dest_addr);
+    // uint64_t pAddr;
+    // try { 
+    //   pAddr = page_table_walk(dest_addr);
+    // } catch ( Page_Fault_Exception ) {
+    //   // HW: place holder
+    //   // should be virt_to_phy_map here
+    //   phy_to_virt_map(0, dest_addr, 0);
+    // }
     DBGPRINT("  [RT:upload] Upload data to vAddr = 0x%lx (pAddr=0x%lx)\n", dest_addr, pAddr);
     dest_addr = pAddr; //Overwirte
 #endif