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memory unit timing optimization

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This commit is contained in:
tinebp 2024-11-21 16:48:41 -08:00
parent 18bf49d1e0
commit 7c4ce74801
1 changed files with 2 additions and 2 deletions
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4
hw/rtl/core/VX_mem_unit.sv
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@ -47,7 +47,7 @@ module VX_mem_unit import VX_gpu_pkg::*; #(
for (genvar i = 0; i < `NUM_LSU_BLOCKS; ++i) begin : g_lmem_switches
VX_lmem_switch #(
.REQ0_OUT_BUF (3),
.REQ0_OUT_BUF (1),
.REQ1_OUT_BUF (0),
.RSP_OUT_BUF (1),
.ARBITER ("P")
@ -78,7 +78,7 @@ module VX_mem_unit import VX_gpu_pkg::*; #(
.TAG_SEL_BITS (LSU_TAG_WIDTH - `UUID_WIDTH),
.ARBITER ("P"),
.REQ_OUT_BUF (3),
.RSP_OUT_BUF (0)
.RSP_OUT_BUF (2)
) lmem_adapter (
.clk (clk),
.reset (reset),