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minor updates

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This commit is contained in:
Blaise Tine 2023-06-30 10:08:38 -04:00
parent 7e1417703f
commit 7ed505a591
7 changed files with 22 additions and 15 deletions
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10
hw/rtl/VX_config.vh
View file

@ -310,7 +310,15 @@
// Pipeline latencies /////////////////////////////////////////////////////////
`ifndef LATENCY_IMUL
`define LATENCY_IMUL 1
`ifdef VIVADO
`define LATENCY_IMUL 4
`endif
`ifdef QUARTUS
`define LATENCY_IMUL 3
`endif
`ifndef LATENCY_IMUL
`define LATENCY_IMUL 4
`endif
`endif
`ifndef LATENCY_FNCP

11
hw/rtl/VX_socket.sv
View file

@ -88,6 +88,7 @@ module VX_socket #(
VX_raster_arb #(
.NUM_INPUTS (1),
.NUM_LANES (`NUM_THREADS),
.NUM_INPUTS (1),
.NUM_OUTPUTS (`SOCKET_SIZE),
.ARBITER ("R"),
.BUFFERED ((`SOCKET_SIZE > 1) ? 2 : 0)
@ -112,8 +113,8 @@ module VX_socket #(
VX_rop_arb #(
.NUM_INPUTS (`SOCKET_SIZE),
.NUM_LANES (`NUM_THREADS),
.NUM_OUTPUTS (1),
.NUM_LANES (`NUM_THREADS),
.ARBITER ("R"),
.BUFFERED ((`SOCKET_SIZE > 1) ? 2 : 0)
) rop_arb (
@ -142,9 +143,9 @@ module VX_socket #(
`RESET_RELAY (tex_arb_reset, reset);
VX_tex_arb #(
.NUM_INPUTS (`SOCKET_SIZE),
.NUM_LANES (`NUM_THREADS),
.NUM_INPUTS (`SOCKET_SIZE),
.NUM_OUTPUTS (1),
.NUM_LANES (`NUM_THREADS),
.TAG_WIDTH (`TEX_REQ_TAG_WIDTH),
.ARBITER ("R"),
.BUFFERED_REQ ((`SOCKET_SIZE > 1) ? 2 : 0)
@ -174,9 +175,9 @@ module VX_socket #(
`RESET_RELAY (fpu_arb_reset, reset);
VX_fpu_arb #(
.NUM_INPUTS (`SOCKET_SIZE),
.NUM_LANES (`NUM_THREADS),
.NUM_INPUTS (`SOCKET_SIZE),
.NUM_OUTPUTS (1),
.NUM_LANES (`NUM_THREADS),
.TAG_WIDTH (`FPU_REQ_TAG_WIDTH),
.ARBITER ("R"),
.BUFFERED_REQ ((`SOCKET_SIZE > 1) ? 2 : 0)

2
hw/rtl/libs/VX_multiplier.sv
View file

@ -14,8 +14,6 @@ module VX_multiplier #(
input wire [B_WIDTH-1:0] datab,
output wire [R_WIDTH-1:0] result
);
`STATIC_ASSERT ((LATENCY <= 3), ("invalid parameter"))
wire [R_WIDTH-1:0] prod_w;
if (SIGNED != 0) begin

2
hw/syn/xilinx/NOTEBOOK
View file

@ -68,6 +68,6 @@ FPGA_BIN_DIR=<bin_dir> TARGET=hw PLATFORM=xilinx_u280_gen3x16_xdma_1_202211_1 ./
# build report logs
<build_dir>/bin/vortex_afu.xclbin.info
<build_dir>/_x/reports/link/syn/ulp_vortex_afu_1_0_synth_1_ulp_vortex_afu_1_0_utilization_synth.rpt
<build_dir>/_x/reports/link/link/imp/impl_1_full_util_routed.rpt
<build_dir>/_x/reports/link/imp/impl_1_hw_bb_locked_timing_summary_routed.rpt # search for keyword "VIOLATED"
<build_dir>/_x/logs/link/syn/ulp_vortex_afu_1_0_synth_1_runme.log

4
tests/opencl/common.mk
View file

@ -8,13 +8,13 @@ ifeq ($(XLEN),64)
RISCV_TOOLCHAIN_PATH ?= /opt/riscv64-gnu-toolchain
VX_CFLAGS += -march=rv64imafd -mabi=lp64d
K_CFLAGS += -march=rv64imafd -mabi=ilp64d
K_LLCFLAGS += -O3 -march=riscv64 -target-abi=ilp64d -mcpu=generic-rv64
K_LLCFLAGS += -march=riscv64 -target-abi=ilp64d -mcpu=generic-rv64
STARTUP_ADDR = 0x180000000
else
RISCV_TOOLCHAIN_PATH ?= /opt/riscv-gnu-toolchain
VX_CFLAGS += -march=rv32imaf -mabi=ilp32f
K_CFLAGS += -march=rv32imaf -mabi=ilp32f
K_LLCFLAGS += -O3 -march=riscv32 -target-abi=ilp32f -mcpu=generic-rv32
K_LLCFLAGS += -march=riscv32 -target-abi=ilp32f -mcpu=generic-rv32
STARTUP_ADDR = 0x80000000
endif

4
tests/regression/draw3d/kernel.cpp
View file

@ -178,7 +178,7 @@ void shader_function_hw(int task_id, kernel_arg_t* __UNIFORM__ arg) {
auto prim_ptr = (rast_prim_t*)arg->prim_addr;
for (;;) {
auto __DIVERGENT__ status = vx_rast();
auto status = vx_rast();
auto stanp_valid = status & 0x1;
if (!stanp_valid)
return;
@ -239,7 +239,7 @@ void shader_function_hw(int task_id, kernel_arg_t* __UNIFORM__ arg) {
TO_RGBA(out_color, r, g, b, a);
}
auto __DIVERGENT__ pos_mask = csr_read(VX_CSR_RASTER_POS_MASK);
auto pos_mask = csr_read(VX_CSR_RASTER_POS_MASK);
#ifdef SW_ENABLE
if (arg->sw_rop) {
OUTPUT(pos_mask, 0, out_color, z, g_gpu_sw.rop);

4
tests/regression/raster/kernel.cpp
View file

@ -16,7 +16,7 @@ using namespace graphics;
}
#define OUTPUT(color) \
auto __DIVERGENT__ pos_mask = csr_read(VX_CSR_RASTER_POS_MASK); \
auto pos_mask = csr_read(VX_CSR_RASTER_POS_MASK); \
auto mask = (pos_mask >> 0) & 0xf; \
auto x = (pos_mask >> 4) & ((1 << (VX_RASTER_DIM_BITS-1))-1); \
auto y = (pos_mask >> (4 + (VX_RASTER_DIM_BITS-1))) & ((1 << (VX_RASTER_DIM_BITS-1))-1); \
@ -29,7 +29,7 @@ void shader_function(int task_id, kernel_arg_t* __UNIFORM__ arg) {
const cocogfx::ColorARGB out_color[4] = {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff};
for (;;) {
auto __DIVERGENT__ status = vx_rast();
auto status = vx_rast();
if (0 == (status & 0x1))
return;
OUTPUT(out_color)