github-mirrors/vortex
1
0
Fork 0
mirror of https://github.com/vortexgpgpu/vortex.git synced 2025-04-23 21:39:10 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

debug scope environment fix

Browse source
This commit is contained in:
Blaise Tine 2024-06-28 07:55:58 -07:00
parent f97ffac7e7
commit 934416d3ec
4 changed files with 18 additions and 17 deletions
Download patch file Download diff file Expand all files Collapse all files

14
hw/syn/altera/opae/Makefile
View file

@ -76,19 +76,19 @@ endif
# Debugigng
ifdef DEBUG
ifeq ($(TARGET), fpga)
CFLAGS += -DNDEBUG -DSCOPE $(DBG_SCOPE_FLAGS)
SCOPE_JSON += $(BUILD_DIR)/scope.json
ifneq ($(TARGET), fpga)
CFLAGS += -DNDEBUG
else
CFLAGS += $(DBG_TRACE_FLAGS)
endif
else
else
CFLAGS += -DNDEBUG
endif
# Enable scope analyzer
ifdef SCOPE
CFLAGS += -DSCOPE
CFLAGS += -DSCOPE $(DBG_SCOPE_FLAGS)
SCOPE_JSON += $(BUILD_DIR)/scope.json
endif
# Enable perf counters
@ -128,7 +128,7 @@ ifeq ($(TARGET), asesim)
afu_sim_setup -s $(BUILD_DIR)/setup.cfg $(BUILD_DIR)/synth
else
afu_synth_setup -s $(BUILD_DIR)/setup.cfg $(BUILD_DIR)/synth
endif
endif
build: ip-gen setup $(SCOPE_JSON)
ifeq ($(TARGET), asesim)
@ -145,5 +145,5 @@ scope-json: $(BUILD_DIR)/scope.json
$(BUILD_DIR)/scope.json: $(BUILD_DIR)/vortex.xml
$(SCRIPT_DIR)/scope.py $(BUILD_DIR)/vortex.xml -o $(BUILD_DIR)/scope.json
clean:
clean:
rm -rf vortex_afu.h $(BUILD_DIR)

15
hw/syn/xilinx/xrt/Makefile
View file

@ -34,7 +34,7 @@ CP = cp -rf
RMDIR = rm -rf
ECHO = @echo
NCPUS := $(shell grep -c ^processor /proc/cpuinfo)
NCPUS := $(shell lscpu | grep "^Core(s) per socket:" | awk '{print $$4}')
JOBS ?= $(shell echo $$(( $(NCPUS) > $(MAX_JOBS) ? $(MAX_JOBS) : $(NCPUS) )))
PLATFORM_TO_XSA = $(strip $(patsubst %.xpfm, % , $(shell basename $(PLATFORM))))
@ -115,11 +115,8 @@ endif
# Debugigng
ifdef DEBUG
VPP_FLAGS += -g --debug.protocol all
ifeq ($(TARGET), hw)
CFLAGS += -DNDEBUG -DSCOPE $(DBG_SCOPE_FLAGS)
SCOPE_JSON += $(BUILD_DIR)/scope.json
#CFLAGS += -DNDEBUG -DCHIPSCOPE $(DBG_SCOPE_FLAGS)
#VPP_FLAGS += --debug.chipscope vortex_afu_1
ifneq ($(TARGET), hw)
CFLAGS += -DNDEBUG
else
VPP_FLAGS += --vivado.prop fileset.sim_1.xsim.elaborate.debug_level=all
CFLAGS += $(DBG_TRACE_FLAGS)
@ -129,6 +126,12 @@ else
CFLAGS += -DNDEBUG
endif
# Enable scope analyzer
ifdef SCOPE
CFLAGS += -DSCOPE $(DBG_SCOPE_FLAGS)
SCOPE_JSON += $(BUILD_DIR)/scope.json
endif
# compilation flags
CFLAGS += -DSYNTHESIS -DVIVADO
CFLAGS += -DXLEN_$(XLEN)

3
sim/opaesim/Makefile
View file

@ -73,7 +73,6 @@ VL_FLAGS += $(CONFIGS)
VL_FLAGS += $(SRC_DIR)/verilator.vlt
VL_FLAGS += $(RTL_INCLUDE)
VL_FLAGS += $(RTL_PKGS)
VL_FLAGS += $(DBG_SCOPE_FLAGS)
CXXFLAGS += $(CONFIGS)
@ -93,7 +92,7 @@ endif
# Enable scope analyzer
ifdef SCOPE
VL_FLAGS += -DSCOPE
VL_FLAGS += -DSCOPE $(DBG_SCOPE_FLAGS)
CXXFLAGS += -DSCOPE
SCOPE_JSON = $(DESTDIR)/scope.json
endif

3
sim/xrtsim/Makefile
View file

@ -72,7 +72,6 @@ VL_FLAGS += $(CONFIGS)
VL_FLAGS += $(SRC_DIR)/verilator.vlt
VL_FLAGS += $(RTL_INCLUDE)
VL_FLAGS += $(RTL_PKGS)
VL_FLAGS += $(DBG_SCOPE_FLAGS)
CXXFLAGS += $(CONFIGS)
@ -92,7 +91,7 @@ endif
# Enable scope analyzer
ifdef SCOPE
VL_FLAGS += -DSCOPE
VL_FLAGS += -DSCOPE $(DBG_SCOPE_FLAGS)
CXXFLAGS += -DSCOPE
SCOPE_JSON = $(DESTDIR)/scope.json
endif