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minor update

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This commit is contained in:
Blaise Tine 2022-07-22 11:58:46 -04:00
parent c613985de4
commit 95c0f16828
12 changed files with 43 additions and 43 deletions
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6
hw/syn/altera/opae/Makefile
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@ -1,8 +1,8 @@
DEVICE_FAMILY ?= arria10
BUILD_DIR ?= build
RTL_DIR = ../../rtl
DPI_DIR = ../../dpi
AFU_DIR = ../../afu/opae
RTL_DIR = ../../../rtl
DPI_DIR = ../../../dpi
AFU_DIR = ../../../afu/opae
IP_DIR = ../ip/$(DEVICE_FAMILY)
ifeq ($(shell which qsub-synth),)

2
hw/syn/altera/quartus/cache/Makefile vendored
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@ -1,7 +1,7 @@
PROJECT = VX_cache
TOP_LEVEL_ENTITY = VX_cache
SRC_FILE = VX_cache.sv
RTL_DIR = ../../../../rtl
RTL_DIR = ../../../../../rtl
FAMILY = "Arria 10"
DEVICE = 10AX115N3F40E2SG

8
hw/syn/altera/quartus/core/Makefile
View file

@ -1,16 +1,16 @@
PROJECT = Core
TOP_LEVEL_ENTITY = VX_core
SRC_FILE = VX_core.sv
RTL_DIR = ../../../../rtl
THIRD_PARTY_DIR = ../../../../../third_party
RTL_DIR = ../../../../../rtl
THIRD_PARTY_DIR = ../../../../../../third_party
FAMILY = "Arria 10"
DEVICE = 10AX115N3F40E2SG
IP_DIR = ../../ip/arria10
IP_DIR = ../../../ip/arria10
#FAMILY = "Stratix 10"
#DEVICE = 1SX280HN2F43E2VG
#IP_DIR = ../../ip/stratix10
#IP_DIR = ../../../ip/stratix10
FPU_INCLUDE = $(RTL_DIR)/fpu_unit;$(THIRD_PARTY_DIR)/fpnew/src;$(THIRD_PARTY_DIR)/fpnew/src/fpu_div_sqrt_mvp/hdl;$(THIRD_PARTY_DIR)/fpnew/src/common_cells/include;$(THIRD_PARTY_DIR)/fpnew/src/common_cells/src
TEX_INCLUDE = $(RTL_DIR)/tex_unit

8
hw/syn/altera/quartus/fpu_core/Makefile
View file

@ -1,16 +1,16 @@
PROJECT = VX_fpu_fpga
TOP_LEVEL_ENTITY = VX_fpu_fpga
SRC_FILE = VX_fpu_fpga.sv
RTL_DIR = ../../../../rtl
THIRD_PARTY_DIR = ../../../../../third_party
RTL_DIR = ../../../../../rtl
THIRD_PARTY_DIR = ../../../../../../third_party
FAMILY = "Arria 10"
DEVICE = 10AX115N3F40E2SG
IP_DIR = ../../ip/arria10
IP_DIR = ../../../ip/arria10
#FAMILY = "Stratix 10"
#DEVICE = 1SX280HN2F43E2VG
#IP_DIR = ../../ip/stratix10
#IP_DIR = ../../../ip/stratix10
FPU_INCLUDE = $(RTL_DIR)/fpu_unit;$(THIRD_PARTY_DIR)/fpnew/src;$(THIRD_PARTY_DIR)/fpnew/src/fpu_div_sqrt_mvp/hdl;$(THIRD_PARTY_DIR)/fpnew/src/common_cells/include;$(THIRD_PARTY_DIR)/fpnew/src/common_cells/src
RTL_INCLUDE = $(FPU_INCLUDE);$(RTL_DIR);$(RTL_DIR)/libs;$(RTL_DIR)/interfaces;$(IP_DIR)

2
hw/syn/altera/quartus/smem/Makefile
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@ -1,7 +1,7 @@
PROJECT = VX_shared_mem
TOP_LEVEL_ENTITY = VX_shared_mem
SRC_FILE = VX_shared_mem.sv
RTL_DIR = ../../../../rtl
RTL_DIR = ../../../../../rtl
FAMILY = "Arria 10"
DEVICE = 10AX115N3F40E2SG

8
hw/syn/altera/quartus/test/Makefile
View file

@ -1,18 +1,18 @@
PROJECT = Vortex
TOP_LEVEL_ENTITY = Vortex
SRC_FILE = Vortex.sv
RTL_DIR = ../../../../rtl
THIRD_PARTY_DIR = ../../../../../third_party
RTL_DIR = ../../../../../rtl
THIRD_PARTY_DIR = ../../../../../../third_party
CONFIGS += -set "EXT_GFX_ENABLE"
FAMILY = "Arria 10"
DEVICE = 10AX115N3F40E2SG
IP_DIR = ../../ip/arria10
IP_DIR = ../../../ip/arria10
#FAMILY = "Stratix 10"
#DEVICE = 1SX280HN2F43E2VG
#IP_DIR = ../../ip/stratix10
#IP_DIR = ../../../ip/stratix10
FPU_INCLUDE = $(RTL_DIR)/fpu_unit;$(THIRD_PARTY_DIR)/fpnew/src;$(THIRD_PARTY_DIR)/fpnew/src/fpu_div_sqrt_mvp/hdl;$(THIRD_PARTY_DIR)/fpnew/src/common_cells/include;$(THIRD_PARTY_DIR)/fpnew/src/common_cells/src
GFX_INCLUDE = $(RTL_DIR)/tex_unit;$(RTL_DIR)/raster_unit;$(RTL_DIR)/rop_unit

8
hw/syn/altera/quartus/texunit/Makefile
View file

@ -1,16 +1,16 @@
PROJECT = Core
TOP_LEVEL_ENTITY = VX_core
SRC_FILE = VX_core.sv
RTL_DIR = ../../../../rtl
THIRD_PARTY_DIR = ../../../../../third_party
RTL_DIR = ../../../../../rtl
THIRD_PARTY_DIR = ../../../../../../third_party
FAMILY = "Arria 10"
DEVICE = 10AX115N3F40E2SG
IP_DIR = ../../ip/arria10
IP_DIR = ../../../ip/arria10
#FAMILY = "Stratix 10"
#DEVICE = 1SX280HN2F43E2VG
#IP_DIR = ../../ip/stratix10
#IP_DIR = ../../../ip/stratix10
FPU_INCLUDE = $(RTL_DIR)/fpu_unit;$(THIRD_PARTY_DIR)/fpnew/src;$(THIRD_PARTY_DIR)/fpnew/src/fpu_div_sqrt_mvp/hdl;$(THIRD_PARTY_DIR)/fpnew/src/common_cells/include;$(THIRD_PARTY_DIR)/fpnew/src/common_cells/src
TEX_INCLUDE = $(RTL_DIR)/tex_unit

10
hw/syn/altera/quartus/top-gfx/Makefile
View file

@ -1,17 +1,17 @@
PROJECT = vortex_afu
TOP_LEVEL_ENTITY = vortex_afu
SRC_FILE = vortex_afu.sv
RTL_DIR = ../../../../rtl
AFU_DIR = ../../../../afu/opae
THIRD_PARTY_DIR = ../../../../../third_party
RTL_DIR = ../../../../../rtl
AFU_DIR = ../../../../../afu/opae
THIRD_PARTY_DIR = ../../../../../../third_party
FAMILY = "Arria 10"
DEVICE = 10AX115N3F40E2SG
IP_DIR = ../../ip/arria10
IP_DIR = ../../../ip/arria10
#FAMILY = "Stratix 10"
#DEVICE = 1SX280HN2F43E2VG
#IP_DIR = ../../ip/stratix10
#IP_DIR = ../../../ip/stratix10
CONFIGS += -set "NOPAE"
CONFIGS += -set "EXT_GFX_ENABLE"

10
hw/syn/altera/quartus/top/Makefile
View file

@ -1,17 +1,17 @@
PROJECT = vortex_afu
TOP_LEVEL_ENTITY = vortex_afu
SRC_FILE = vortex_afu.sv
RTL_DIR = ../../../../rtl
AFU_DIR = ../../../../afu/opae
THIRD_PARTY_DIR = ../../../../../third_party
RTL_DIR = ../../../../../rtl
AFU_DIR = ../../../../../afu/opae
THIRD_PARTY_DIR = ../../../../../../third_party
FAMILY = "Arria 10"
DEVICE = 10AX115N3F40E2SG
IP_DIR = ../../ip/arria10
IP_DIR = ../../../ip/arria10
#FAMILY = "Stratix 10"
#DEVICE = 1SX280HN2F43E2VG
#IP_DIR = ../../ip/stratix10
#IP_DIR = ../../../ip/stratix10
CONFIGS += -set "NOPAE"

8
hw/syn/altera/quartus/unittest/Makefile
View file

@ -1,16 +1,16 @@
PROJECT = Unittest
TOP_LEVEL_ENTITY = VX_req_dispatch
SRC_FILE = VX_req_dispatch.sv
RTL_DIR = ../../../../rtl
THIRD_PARTY_DIR = ../../../../../third_party
RTL_DIR = ../../../../../rtl
THIRD_PARTY_DIR = ../../../../../../third_party
FAMILY = "Arria 10"
DEVICE = 10AX115N3F40E2SG
IP_DIR = ../../ip/arria10
IP_DIR = ../../../ip/arria10
#FAMILY = "Stratix 10"
#DEVICE = 1SX280HN2F43E2VG
#IP_DIR = ../../ip/stratix10
#IP_DIR = ../../../ip/stratix10
FPU_INCLUDE = $(RTL_DIR)/fpu_unit;$(THIRD_PARTY_DIR)/fpnew/src;$(THIRD_PARTY_DIR)/fpnew/src/fpu_div_sqrt_mvp/hdl;$(THIRD_PARTY_DIR)/fpnew/src/common_cells/include;$(THIRD_PARTY_DIR)/fpnew/src/common_cells/src
TEX_INCLUDE = $(RTL_DIR)/tex_unit

8
hw/syn/altera/quartus/vortex-gfx/Makefile
View file

@ -1,16 +1,16 @@
PROJECT = Vortex
TOP_LEVEL_ENTITY = Vortex
SRC_FILE = Vortex.sv
RTL_DIR = ../../../../rtl
THIRD_PARTY_DIR = ../../../../../third_party
RTL_DIR = ../../../../../rtl
THIRD_PARTY_DIR = ../../../../../../third_party
FAMILY = "Arria 10"
DEVICE = 10AX115N3F40E2SG
IP_DIR = ../../ip/arria10
IP_DIR = ../../../ip/arria10
#FAMILY = "Stratix 10"
#DEVICE = 1SX280HN2F43E2VG
#IP_DIR = ../../ip/stratix10
#IP_DIR = ../../../ip/stratix10
CONFIGS += -set "EXT_GFX_ENABLE"

8
hw/syn/altera/quartus/vortex/Makefile
View file

@ -1,16 +1,16 @@
PROJECT = Vortex
TOP_LEVEL_ENTITY = Vortex
SRC_FILE = Vortex.sv
RTL_DIR = ../../../../rtl
THIRD_PARTY_DIR = ../../../../../third_party
RTL_DIR = ../../../../../rtl
THIRD_PARTY_DIR = ../../../../../../third_party
FAMILY = "Arria 10"
DEVICE = 10AX115N3F40E2SG
IP_DIR = ../../ip/arria10
IP_DIR = ../../../ip/arria10
#FAMILY = "Stratix 10"
#DEVICE = 1SX280HN2F43E2VG
#IP_DIR = ../../ip/stratix10
#IP_DIR = ../../../ip/stratix10
#CONFIGS += -set "L1_DISABLE"