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minor updates

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This commit is contained in:
Blaise Tine 2021-01-17 12:50:07 -08:00
parent a69ba5ad7b
commit 98945df5ae
2 changed files with 20 additions and 16 deletions
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13
hw/rtl/VX_decode.v
View file

@ -305,8 +305,7 @@ module VX_decode #(
///////////////////////////////////////////////////////////////////////////
assign decode_if.valid = ifetch_rsp_if.valid
&& (decode_if.ex_type != `EX_NOP); // skip noop
assign decode_if.valid = ifetch_rsp_if.valid;
assign decode_if.wid = ifetch_rsp_if.wid;
assign decode_if.tmask = ifetch_rsp_if.tmask;
@ -348,10 +347,12 @@ module VX_decode #(
assign decode_if.rs3 = rs3;
`endif
assign decode_if.used_regs = ((`NUM_REGS)'(use_rd) << decode_if.rd)
| ((`NUM_REGS)'(use_rs1) << decode_if.rs1)
| ((`NUM_REGS)'(use_rs2) << decode_if.rs2)
| ((`NUM_REGS)'(use_rs3) << decode_if.rs3);
wire is_nop = (decode_if.ex_type == `EX_NOP);
assign decode_if.used_regs = ((`NUM_REGS)'(use_rd && !is_nop) << decode_if.rd)
| ((`NUM_REGS)'(use_rs1 && !is_nop) << decode_if.rs1)
| ((`NUM_REGS)'(use_rs2 && !is_nop) << decode_if.rs2)
| ((`NUM_REGS)'(use_rs3 && !is_nop) << decode_if.rs3);
assign decode_if.imm = (is_lui || is_auipc) ? {upper_imm, 12'(0)} :
(is_jal || is_jalr || is_jals) ? jalx_offset :

23
hw/rtl/VX_instr_demux.v
View file

@ -145,15 +145,18 @@ module VX_instr_demux (
);
// can take next request?
assign execute_if.ready = (alu_req_ready && (execute_if.ex_type == `EX_ALU))
|| (lsu_req_ready && (execute_if.ex_type == `EX_LSU))
|| (csr_req_ready && (execute_if.ex_type == `EX_CSR))
`ifdef EXT_M_ENABLE
|| (mul_req_ready && (execute_if.ex_type == `EX_MUL))
`endif
`ifdef EXT_F_ENABLE
|| (fpu_req_ready && (execute_if.ex_type == `EX_FPU))
`endif
|| (gpu_req_ready && (execute_if.ex_type == `EX_GPU));
reg ready_r;
always @(*) begin
case (execute_if.ex_type)
`EX_ALU: ready_r = alu_req_ready;
`EX_LSU: ready_r = lsu_req_ready;
`EX_CSR: ready_r = csr_req_ready;
`EX_MUL: ready_r = mul_req_ready;
`EX_FPU: ready_r = fpu_req_ready;
`EX_GPU: ready_r = gpu_req_ready;
default: ready_r = 1'b1; // ignore NOPs
endcase
end
assign execute_if.ready = ready_r;
endmodule