github-mirrors/vortex
1
0
Fork 0
mirror of https://github.com/vortexgpgpu/vortex.git synced 2025-04-24 05:47:35 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

minor updates

Browse source
This commit is contained in:
Blaise Tine 2023-03-25 05:09:41 -04:00
parent a8f9a20b7e
commit aa3d4de3d2
3 changed files with 18 additions and 25 deletions
Download patch file Download diff file Expand all files Collapse all files

2
docs/debugging.md
View file

@ -40,7 +40,7 @@ A debug trace `run.log` is generated in the current directory during the program
Debugging the FPGA directly may be necessary to investigate runtime bugs that the RTL simulation cannot catch. We have implemented an in-house scope analyzer for Vortex that works when the FPGA is running. To enable the FPGA scope analyzer, the FPGA bitstream should be built using `SCOPE=1` flag
& cd /hw/syn/opae
$ CONFIGS=-DSCOPE=1 make fpga-4c
$ CONFIGS="-DSCOPE=1" TARGET=fpga make
When running the program on the FPGA, you need to pass the `--scope` flag to the `blackbox` tool.

15
docs/fpga_setup.md
View file

@ -22,10 +22,11 @@ The FPGA has to following configuration options:
Command line:
$ cd hw/syn/opae
$ NUM_CORES=4 make build
$ cd hw/syn/altera/opae
$ PREFIX=test1 TARGET=fpga NUM_CORES=4 make
A new folder (ex: `build_fpga_4c`) will be created and the build will start and take ~30-480 min to complete.
A new folder (ex: `test1_xxx_4c`) will be created and the build will start and take ~30-480 min to complete.
Setting TARGET=ase will build the project for simulation using Intel ASE.
OPAE Build Configuration
@ -38,14 +39,14 @@ The hardware configuration file `/hw/rtl/VX_config.vh` defines all the hardware
You configure the syntesis build from the command line:
$ CONFIGS="-DPERF_ENABLE -DNUM_THREADS=8" make build
$ CONFIGS="-DPERF_ENABLE -DNUM_THREADS=8" make
OPAE Build Progress
-------------------
You could check the last 10 lines in the build log for possible errors until build completion.
$ tail -n 10 ./build_fpga_<num-of-cores>c/build.log
$ tail -n 10 <build_dir>/build.log
Check if the build is still running by looking for quartus_sh, quartus_syn, or quartus_fit programs.
@ -57,13 +58,13 @@ If the build fails and you need to restart it, clean up the build folder using t
The file `vortex_afu.gbs` should exist when the build is done:
$ ls -lsa ./build_fpga_<num-of-cores>c/vortex_afu.gbs
$ ls -lsa <build_dir>/vortex_afu.gbs
Signing the bitstream and Programming the FPGA
----------------------------------------------
$ cd ./build_fpga_<num-of-cores>c
$ cd <build_dir>
$ PACSign PR -t UPDATE -H openssl_manager -i vortex_afu.gbs -o vortex_afu_unsigned_ssl.gbs
$ fpgasupdate vortex_afu_unsigned_ssl.gbs

26
hw/syn/altera/opae/Makefile
View file

@ -61,6 +61,10 @@ CFLAGS += $(RTL_INCLUDE)
CFLAGS += -DSYNTHESIS
CFLAGS += -DQUARTUS
ifeq ($(TARGET), ase)
CFLAGS += -DSIMULATION
endif
# Debugigng
ifdef DEBUG
CFLAGS += $(DBG_FLAGS)
@ -78,35 +82,25 @@ ifdef PERF
CFLAGS += -DPERF_ENABLE
endif
all: swconfig ip-gen gen-sources setup build
all: swconfig ip-gen setup build
ip-gen: $(IP_CACHE_DIR)/ip-gen.log
$(IP_CACHE_DIR)/ip-gen.log:
../ip_gen.sh $(IP_CACHE_DIR)
# AFU info from JSON file, including AFU UUID
swconfig: vortex_afu.h
vortex_afu.h: vortex_afu.json
afu_json_mgr json-info --afu-json=$^ --c-hdr=$@
setup:
mkdir -p $(BUILD_DIR)/src
ifeq ($(TARGET), ase)
$(SCRIPT_DIR)/gen_sources.sh $(CFLAGS) $(CONFIGS_SEL) -DSIMULATION -G$(BUILD_DIR)/src/globals.vh -F$(BUILD_DIR)/src -Osources.txt
rm -rf $(BUILD_DIR)
afu_sim_setup -s setup.cfg $(BUILD_DIR)
mkdir -p $(BUILD_DIR)/src
$(SCRIPT_DIR)/gen_sources.sh $(CFLAGS) $(CONFIGS_SEL) -DSIMULATION -G$(BUILD_DIR)/src/globals.vh -F$(BUILD_DIR)/src
else
$(SCRIPT_DIR)/gen_sources.sh $(CFLAGS) $(CONFIGS_SEL) -G$(BUILD_DIR)/src/globals.vh -F$(BUILD_DIR)/src -Osources.txt
rm -rf $(BUILD_DIR)
afu_synth_setup -s setup.cfg $(BUILD_DIR)
mkdir -p $(BUILD_DIR)/src
$(SCRIPT_DIR)/gen_sources.sh $(CFLAGS) $(CONFIGS_SEL) -G$(BUILD_DIR)/src/globals.vh -F$(BUILD_DIR)/src
ifeq ($(TARGET), ase)
afu_sim_setup -f -s setup.cfg $(BUILD_DIR)
else
afu_synth_setup -f -s setup.cfg $(BUILD_DIR)
endif
# build
build: ip-gen setup
ifeq ($(TARGET), ase)
make -C $(BUILD_DIR) > $(BUILD_DIR)/build.log 2>&1 &
@ -114,7 +108,5 @@ else
cd $(BUILD_DIR) && $(RUN_SYNTH)
endif
# cleanup
clean:
rm -rf vortex_afu.h $(BUILD_DIR)