minor update

hw/rtl/Vortex.sv

@@ -181,16 +181,15 @@ module Vortex import VX_gpu_pkg::*; (
         end
     end
 
+    wire mem_rd_req_fire = mem_req_fire && ~mem_bus_if.req_data.rw;
+    wire mem_wr_req_fire = mem_req_fire && mem_bus_if.req_data.rw;
+
     always @(posedge clk) begin
         if (reset) begin       
             mem_perf <= '0;
-        end else begin  
-            if (mem_req_fire && ~mem_bus_if.req_data.rw) begin
-                mem_perf.reads <= mem_perf.reads + `PERF_CTR_BITS'(1);
-            end
-            if (mem_req_fire && mem_bus_if.req_data.rw) begin
-                mem_perf.writes <= mem_perf.writes + `PERF_CTR_BITS'(1);
-            end      
+        end else begin
+            mem_perf.reads <= mem_perf.reads + `PERF_CTR_BITS'(mem_rd_req_fire);
+            mem_perf.writes <= mem_perf.writes + `PERF_CTR_BITS'(mem_wr_req_fire);
             mem_perf.latency <= mem_perf.latency + perf_mem_pending_reads;
         end
     end

hw/rtl/core/VX_issue.sv

@@ -156,13 +156,14 @@ module VX_issue #(
 
 `ifdef PERF_ENABLE
     reg [`PERF_CTR_BITS-1:0] perf_ibf_stalls;
+    
+    wire decode_stall = decode_if.valid && ~decode_if.ready;
+
     always @(posedge clk) begin
         if (reset) begin
             perf_ibf_stalls <= '0;
         end else begin
-            if (decode_if.valid && ~decode_if.ready) begin
-                perf_ibf_stalls <= perf_ibf_stalls + `PERF_CTR_BITS'(1);
-            end
+            perf_ibf_stalls <= perf_ibf_stalls + `PERF_CTR_BITS'(decode_stall);
         end
     end
 

hw/rtl/core/VX_schedule.sv

@@ -383,13 +383,16 @@ module VX_schedule import VX_gpu_pkg::*; #(
 `ifdef PERF_ENABLE    
     reg [`PERF_CTR_BITS-1:0] perf_sched_stalls;
     reg [`PERF_CTR_BITS-1:0] perf_fetch_stalls;
+
+    wire schedule_stall = schedule_if.valid && ~schedule_if.ready;
+
     always @(posedge clk) begin
         if (reset) begin
             perf_sched_stalls <= '0;
             perf_fetch_stalls <= '0;            
         end else begin
-            perf_sched_stalls <= perf_sched_stalls + `PERF_CTR_BITS'(!schedule_valid);
-            perf_fetch_stalls <= perf_fetch_stalls + `PERF_CTR_BITS'(schedule_if.valid && !schedule_if.ready);            
+            perf_sched_stalls <= perf_sched_stalls + `PERF_CTR_BITS'(~schedule_valid);
+            perf_fetch_stalls <= perf_fetch_stalls + `PERF_CTR_BITS'(schedule_stall);
         end
     end
 

hw/rtl/core/VX_sfu_unit.sv

@@ -196,11 +196,14 @@ module VX_sfu_unit import VX_gpu_pkg::*; #(
 
 `ifdef PERF_ENABLE
     reg [`PERF_CTR_BITS-1:0] perf_wctl_stalls;
+
+    wire wctl_execute_stall = wctl_execute_if.valid && ~wctl_execute_if.ready;
+
     always @(posedge clk) begin
         if (reset) begin
             perf_wctl_stalls <= '0;
         end else begin
-            perf_wctl_stalls <= perf_wctl_stalls + `PERF_CTR_BITS'(wctl_execute_if.valid && ~wctl_execute_if.ready);
+            perf_wctl_stalls <= perf_wctl_stalls + `PERF_CTR_BITS'(wctl_execute_stall);
         end
     end
     assign sfu_perf_if.wctl_stalls = perf_wctl_stalls;

hw/rtl/core/VX_wctl_unit.sv

@@ -49,7 +49,7 @@ module VX_wctl_unit import VX_gpu_pkg::*; #(
     wire is_join   = (execute_if.data.op_type == `INST_SFU_JOIN);
     wire is_bar    = (execute_if.data.op_type == `INST_SFU_BAR);
 
-    wire [LANE_BITS-1:0] tid;
+    wire [`UP(LANE_BITS)-1:0] tid;
     if (LANE_BITS != 0) begin
         assign tid = execute_if.data.tid[0 +: LANE_BITS];
     end else begin