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bug fixes
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This commit is contained in:
parent
c04c8b1534
commit
b21f2c22d6
6 changed files with 24 additions and 20 deletions
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@ -81,7 +81,7 @@ inline bool is_nan_boxed(uint64_t value) {
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inline bool is_nan_boxed16(uint64_t value) {
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#ifdef XLEN_64
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return (uint32_t(value >> 16) == 0xffffffffffff);
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return (uint64_t(value >> 16) == 0xffffffffffff);
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#else
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return true;
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#endif
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@ -70,7 +70,7 @@ module VX_ibuffer import VX_gpu_pkg::*; #(
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.ready_out(uop_sequencer_if.ready)
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);
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`ifndef L1_ENABLE
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assign decode_if.ibuf_pop[w] = uop_sequencer_if[w].valid && uop_sequencer_if[w].ready;
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assign decode_if.ibuf_pop[w] = uop_sequencer_if.valid && uop_sequencer_if.ready;
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`endif
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VX_uop_sequencer uop_sequencer (
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@ -24,10 +24,10 @@ module VX_tcu_fedp_fp #(
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input wire[2:0] fmt_s,
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input wire[2:0] fmt_d,
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input wire [N-1:0][DATAW-1:0] a_row,
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input wire [N-1:0][DATAW-1:0] b_col,
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input wire [DATAW-1:0] c_val,
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output wire [DATAW-1:0] d_val
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input wire [N-1:0][`XLEN-1:0] a_row,
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input wire [N-1:0][`XLEN-1:0] b_col,
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input wire [`XLEN-1:0] c_val,
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output wire [`XLEN-1:0] d_val
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);
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wire [DATAW-1:0] a_row_p [0:N-1];
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wire [DATAW-1:0] b_col_p [0:N-1];
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@ -35,6 +35,8 @@ module VX_tcu_fedp_fp #(
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wire [2:0] fmt_s_p [0:N-1];
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wire [2:0] fmt_d_p [0:N-1];
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`UNUSED_VAR ({a_row, b_col, c_val});
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for (genvar i = 0; i < N; i++) begin: g_pipe
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VX_pipe_register #(
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.DATAW (DATAW),
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@ -43,7 +45,7 @@ module VX_tcu_fedp_fp #(
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.clk (clk),
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.reset (reset),
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.enable (enable),
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.data_in (a_row[i]),
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.data_in (a_row[i][DATAW-1:0]),
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.data_out (a_row_p[i])
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);
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VX_pipe_register #(
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@ -53,7 +55,7 @@ module VX_tcu_fedp_fp #(
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.clk (clk),
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.reset (reset),
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.enable (enable),
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.data_in (b_col[i]),
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.data_in (b_col[i][DATAW-1:0]),
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.data_out (b_col_p[i])
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);
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@ -71,7 +73,7 @@ module VX_tcu_fedp_fp #(
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wire [DATAW-1:0] fma_out [0:N];
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assign fma_out[0] = c_val;
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assign fma_out[0] = c_val[DATAW-1:0];
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for (genvar i = 0; i < N; i++) begin : g_fmas
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`ifdef TCU_DPI
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@ -106,6 +108,6 @@ module VX_tcu_fedp_fp #(
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end
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assign d_val = fma_out[N];
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assign d_val = `XLEN'(fma_out[N]);
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endmodule
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@ -24,10 +24,10 @@ module VX_tcu_fedp_int #(
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input wire[2:0] fmt_s,
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input wire[2:0] fmt_d,
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input wire [N-1:0][DATAW-1:0] a_row,
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input wire [N-1:0][DATAW-1:0] b_col,
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input wire [DATAW-1:0] c_val,
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output wire [DATAW-1:0] d_val
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input wire [N-1:0][`XLEN-1:0] a_row,
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input wire [N-1:0][`XLEN-1:0] b_col,
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input wire [`XLEN-1:0] c_val,
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output wire [`XLEN-1:0] d_val
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);
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wire [DATAW-1:0] a_row_p [0:N-1];
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wire [DATAW-1:0] b_col_p [0:N-1];
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@ -35,6 +35,8 @@ module VX_tcu_fedp_int #(
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wire [2:0] fmt_s_p [0:N-1];
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wire [2:0] fmt_d_p [0:N-1];
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`UNUSED_VAR ({a_row, b_col, c_val});
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for (genvar i = 0; i < N; i++) begin: g_pipe
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VX_pipe_register #(
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.DATAW (DATAW),
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@ -43,7 +45,7 @@ module VX_tcu_fedp_int #(
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.clk (clk),
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.reset (reset),
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.enable (enable),
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.data_in (a_row[i]),
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.data_in (a_row[i][DATAW-1:0]),
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.data_out (a_row_p[i])
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);
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VX_pipe_register #(
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@ -53,7 +55,7 @@ module VX_tcu_fedp_int #(
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.clk (clk),
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.reset (reset),
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.enable (enable),
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.data_in (b_col[i]),
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.data_in (b_col[i][DATAW-1:0]),
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.data_out (b_col_p[i])
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);
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@ -71,7 +73,7 @@ module VX_tcu_fedp_int #(
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wire [DATAW-1:0] fma_out [0:N];
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assign fma_out[0] = c_val;
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assign fma_out[0] = c_val[DATAW-1:0];
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for (genvar i = 0; i < N; i++) begin : g_fmas
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VX_tcu_fma_int #(
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@ -89,6 +91,6 @@ module VX_tcu_fedp_int #(
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);
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end
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assign d_val = fma_out[N];
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assign d_val = `XLEN'(fma_out[N]);
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endmodule
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@ -110,7 +110,7 @@ module VX_tcu_fp import VX_gpu_pkg::*, VX_tcu_pkg::*; #(
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wire [`XLEN-1:0] c_val = execute_if.data.rs3_data[i * TCU_TC_N + j];
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VX_tcu_fedp_fp #(
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.DATAW (`XLEN),
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.DATAW (32),
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.N (TCU_TC_K)
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) fedp (
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.clk (clk),
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@ -110,7 +110,7 @@ module VX_tcu_int import VX_gpu_pkg::*, VX_tcu_pkg::*; #(
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wire [`XLEN-1:0] c_val = execute_if.data.rs3_data[i * TCU_TC_N + j];
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VX_tcu_fedp_int #(
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.DATAW (`XLEN),
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.DATAW (32),
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.N (TCU_TC_K)
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) fedp (
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.clk (clk),
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