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reset cleanup

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This commit is contained in:
Blaise Tine 2024-09-08 20:37:28 -07:00
parent 202af1e783
commit b56aa00f4f
3 changed files with 13 additions and 30 deletions
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6
hw/rtl/VX_cluster.sv
View file

@ -56,14 +56,12 @@ module VX_cluster import VX_gpu_pkg::*; #(
VX_gbar_bus_if per_socket_gbar_bus_if[`NUM_SOCKETS]();
VX_gbar_bus_if gbar_bus_if();
`RESET_RELAY (gbar_reset, reset);
VX_gbar_arb #(
.NUM_REQS (`NUM_SOCKETS),
.OUT_BUF ((`NUM_SOCKETS > 2) ? 1 : 0) // bgar_unit has no backpressure
) gbar_arb (
.clk (clk),
.reset (gbar_reset),
.reset (reset),
.bus_in_if (per_socket_gbar_bus_if),
.bus_out_if (gbar_bus_if)
);
@ -72,7 +70,7 @@ module VX_cluster import VX_gpu_pkg::*; #(
.INSTANCE_ID ($sformatf("gbar%0d", CLUSTER_ID))
) gbar_unit (
.clk (clk),
.reset (gbar_reset),
.reset (reset),
.gbar_bus_if (gbar_bus_if)
);

23
hw/rtl/core/VX_core.sv
View file

@ -75,13 +75,6 @@ module VX_core import VX_gpu_pkg::*; #(
assign mem_perf_tmp_if.mem = mem_perf_if.mem;
`endif
`RESET_RELAY (schedule_reset, reset);
`RESET_RELAY (fetch_reset, reset);
`RESET_RELAY (decode_reset, reset);
`RESET_RELAY (issue_reset, reset);
`RESET_RELAY (execute_reset, reset);
`RESET_RELAY (commit_reset, reset);
base_dcrs_t base_dcrs;
VX_dcr_data dcr_data (
@ -98,7 +91,7 @@ module VX_core import VX_gpu_pkg::*; #(
.CORE_ID (CORE_ID)
) schedule (
.clk (clk),
.reset (schedule_reset),
.reset (reset),
`ifdef PERF_ENABLE
.sched_perf (pipeline_perf_if.sched),
@ -126,7 +119,7 @@ module VX_core import VX_gpu_pkg::*; #(
) fetch (
`SCOPE_IO_BIND (0)
.clk (clk),
.reset (fetch_reset),
.reset (reset),
.icache_bus_if (icache_bus_if),
.schedule_if (schedule_if),
.fetch_if (fetch_if)
@ -136,7 +129,7 @@ module VX_core import VX_gpu_pkg::*; #(
.INSTANCE_ID ($sformatf("%s-decode", INSTANCE_ID))
) decode (
.clk (clk),
.reset (decode_reset),
.reset (reset),
.fetch_if (fetch_if),
.decode_if (decode_if),
.decode_sched_if(decode_sched_if)
@ -148,7 +141,7 @@ module VX_core import VX_gpu_pkg::*; #(
`SCOPE_IO_BIND (1)
.clk (clk),
.reset (issue_reset),
.reset (reset),
`ifdef PERF_ENABLE
.issue_perf (pipeline_perf_if.issue),
@ -166,7 +159,7 @@ module VX_core import VX_gpu_pkg::*; #(
`SCOPE_IO_BIND (2)
.clk (clk),
.reset (execute_reset),
.reset (reset),
`ifdef PERF_ENABLE
.mem_perf_if (mem_perf_tmp_if),
@ -191,7 +184,7 @@ module VX_core import VX_gpu_pkg::*; #(
.INSTANCE_ID ($sformatf("%s-commit", INSTANCE_ID))
) commit (
.clk (clk),
.reset (commit_reset),
.reset (reset),
.commit_if (commit_if),
@ -201,13 +194,11 @@ module VX_core import VX_gpu_pkg::*; #(
.commit_sched_if(commit_sched_if)
);
`RESET_RELAY (lmem_unit_reset, reset);
VX_mem_unit #(
.INSTANCE_ID (INSTANCE_ID)
) mem_unit (
.clk (clk),
.reset (lmem_unit_reset),
.reset (reset),
`ifdef PERF_ENABLE
.lmem_perf (mem_perf_tmp_if.lmem),
`endif

14
hw/rtl/core/VX_execute.sv
View file

@ -51,15 +51,11 @@ module VX_execute import VX_gpu_pkg::*; #(
VX_fpu_csr_if fpu_csr_if[`NUM_FPU_BLOCKS]();
`endif
`RESET_RELAY (alu_reset, reset);
`RESET_RELAY (lsu_reset, reset);
`RESET_RELAY (sfu_reset, reset);
VX_alu_unit #(
.INSTANCE_ID ($sformatf("%s-alu", INSTANCE_ID))
) alu_unit (
.clk (clk),
.reset (alu_reset),
.reset (reset),
.dispatch_if (dispatch_if[`EX_ALU * `ISSUE_WIDTH +: `ISSUE_WIDTH]),
.commit_if (commit_if[`EX_ALU * `ISSUE_WIDTH +: `ISSUE_WIDTH]),
.branch_ctl_if (branch_ctl_if)
@ -72,20 +68,18 @@ module VX_execute import VX_gpu_pkg::*; #(
) lsu_unit (
`SCOPE_IO_BIND (0)
.clk (clk),
.reset (lsu_reset),
.reset (reset),
.dispatch_if (dispatch_if[`EX_LSU * `ISSUE_WIDTH +: `ISSUE_WIDTH]),
.commit_if (commit_if[`EX_LSU * `ISSUE_WIDTH +: `ISSUE_WIDTH]),
.lsu_mem_if (lsu_mem_if)
);
`ifdef EXT_F_ENABLE
`RESET_RELAY (fpu_reset, reset);
VX_fpu_unit #(
.INSTANCE_ID ($sformatf("%s-fpu", INSTANCE_ID))
) fpu_unit (
.clk (clk),
.reset (fpu_reset),
.reset (reset),
.dispatch_if (dispatch_if[`EX_FPU * `ISSUE_WIDTH +: `ISSUE_WIDTH]),
.commit_if (commit_if[`EX_FPU * `ISSUE_WIDTH +: `ISSUE_WIDTH]),
.fpu_csr_if (fpu_csr_if)
@ -97,7 +91,7 @@ module VX_execute import VX_gpu_pkg::*; #(
.CORE_ID (CORE_ID)
) sfu_unit (
.clk (clk),
.reset (sfu_reset),
.reset (reset),
`ifdef PERF_ENABLE
.mem_perf_if (mem_perf_if),
.pipeline_perf_if (pipeline_perf_if),