mirror of
https://github.com/vortexgpgpu/vortex.git
synced 2025-04-24 05:47:35 -04:00
minor updates
This commit is contained in:
parent
e8f74fe696
commit
b93a671024
4 changed files with 160 additions and 89 deletions
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@ -57,9 +57,12 @@ module VX_afu_control #(
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// bit 0 - Channel 0 (ap_done)
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// bit 1 - Channel 1 (ap_ready)
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// others - reserved
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// 0x10 : Low 32-bit Data signal of dcr
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// 0x14 : High 32-bit Data signal of dcr
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// 0x18 : Control signal of dcr
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// 0x10 : Low 32-bit Data signal of mem_addr
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// 0x14 : High 32-bit Data signal of mem_addr
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// 0x18 : Control signal of mem_addr
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// 0x1C : Low 32-bit Data signal of dcr
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// 0x20 : High 32-bit Data signal of dcr
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// 0x24 : Control signal of dcr
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// (SC = Self Clear, COR = Clear on Read, TOW = Toggle on Write, COH = Clear on Handshake)
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// Parameter
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@ -70,9 +73,12 @@ module VX_afu_control #(
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ADDR_GIE = 6'h04,
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ADDR_IER = 6'h08,
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ADDR_ISR = 6'h0c,
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ADDR_DCR_0 = 6'h10,
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ADDR_DCR_1 = 6'h14,
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ADDR_DCR_CTRL = 6'h18;
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ADDR_MEM_0 = 6'h10,
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ADDR_MEM_1 = 6'h14,
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ADDR_MEM_CTRL = 6'h18
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ADDR_DCR_0 = 6'h1C,
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ADDR_DCR_1 = 6'h20,
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ADDR_DCR_CTRL = 6'h24;
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localparam
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WSTATE_IDLE = 2'd0,
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@ -105,6 +111,7 @@ module VX_afu_control #(
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reg int_gie = 2'b0;
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reg [1:0] int_ier = 2'b0;
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reg [1:0] int_isr = 2'b0;
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reg [63:0] int_mem = 64'b0;
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reg [31:0] int_dcra = 32'b0;
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reg [31:0] int_dcrv = 32'b0;
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@ -307,6 +314,26 @@ module VX_afu_control #(
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end
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end
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// int_mem[31:0]
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always @(posedge clk) begin
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if (reset)
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int_mem[31:0] <= 0;
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else if (clk_en) begin
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if (wd_hs && waddr == ADDR_MEM_0)
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int_mem[31:0] <= (s_axi_wdata & wmask) | (int_mem[31:0] & ~wmask);
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end
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end
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// int_mem[63:32]
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always @(posedge clk) begin
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if (reset)
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int_mem[63:32] <= 0;
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else if (clk_en) begin
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if (wd_hs && waddr == ADDR_MEM_1)
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int_mem[63:32] <= (s_axi_wdata & wmask) | (int_mem[63:32] & ~wmask);
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end
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end
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// int_dcra
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always @(posedge clk) begin
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if (reset)
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@ -76,8 +76,11 @@ module vortex_afu #(
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`STATIC_ASSERT((C_M_AXI_GMEM_ID_WIDTH == `VX_MEM_TAG_WIDTH), ("invalid memory tag size: current=%0d, expected=%0d", C_M_AXI_GMEM_ID_WIDTH, `VX_MEM_TAG_WIDTH))
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wire clk = ap_clk;
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wire reset = ~ap_rst_n;
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// Register and invert reset signal.
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reg reset;
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always @(posedge ap_clk) begin
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reset <= ~ap_rst_n;
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end
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reg vx_reset;
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wire vx_busy;
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@ -94,7 +97,7 @@ module vortex_afu #(
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reg [$clog2(`RESET_DELAY+1)-1:0] vx_reset_ctr;
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reg vx_running;
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always @(posedge clk) begin
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always @(posedge ap_clk) begin
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if (~vx_running && vx_reset == 0 && ap_start) begin
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vx_reset_ctr <= 0;
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end else begin
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@ -102,7 +105,7 @@ module vortex_afu #(
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end
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end
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always @(posedge clk) begin
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always @(posedge ap_clk) begin
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if (reset) begin
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vx_reset <= 0;
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vx_running <= 0;
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@ -127,7 +130,7 @@ module vortex_afu #(
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.AXI_ADDR_WIDTH (C_S_AXI_CONTROL_ADDR_WIDTH),
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.AXI_DATA_WIDTH (C_S_AXI_CONTROL_DATA_WIDTH)
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) afu_control (
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.clk (clk),
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.clk (ap_clk),
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.reset (reset),
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.clk_en (1'b1),
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@ -173,7 +176,7 @@ module vortex_afu #(
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.AXI_ADDR_WIDTH (C_M_AXI_GMEM_ADDR_WIDTH),
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.AXI_TID_WIDTH (C_M_AXI_GMEM_ID_WIDTH)
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) vortex_axi (
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.clk (clk),
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.clk (ap_clk),
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.reset (reset || vx_reset),
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.m_axi_awid (m_axi_gmem_awid),
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@ -1,2 +1,5 @@
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## Xilinx Build and Ecosystem Setup
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make all TARGET=hw_emu PLATFORM=xilinx_u280_xdma_201920_3 > build.log 2>&1
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vivado -mode batch -source scripts/gen_ips.tcl -tclargs ../../../ip/xilinx/xilinx_u280_xdma_201920_3
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@ -1,69 +1,9 @@
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#
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# Copyright 2019-2021 Xilinx, Inc.
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# makefile-generator v1.0.3
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#
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# Points to top directory of Git repository
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MK_PATH := $(abspath $(lastword $(MAKEFILE_LIST)))
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COMMON_REPO ?= $(shell bash -c 'export MK_PATH=$(MK_PATH); echo $${MK_PATH%rtl_kernels/rtl_user_managed/*}')
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PWD = $(shell readlink -f .)
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XF_PROJ_ROOT = $(shell readlink -f $(COMMON_REPO))
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KERNEL_NAME = vortex_afu
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.PHONY: help
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####################### Checking if PLATFORM in allowlist #####################
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PLATFORM_BLOCKLIST += nodma
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ifneq ($(TARGET),$(findstring $(TARGET), hw hw_emu))
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$(error Application supports only hw hw_emu TARGET. Please use the target for running the application)
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endif
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PLATFORM ?= xilinx_u50_gen3x16_xdma_201920_3
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DEV_ARCH := $(shell platforminfo -p $(PLATFORM) | grep 'FPGA Family' | sed 's/.*://' | sed '/ai_engine/d' | sed 's/^[[:space:]]*//')
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CPU_TYPE := $(shell platforminfo -p $(PLATFORM) | grep 'CPU Type' | sed 's/.*://' | sed '/ai_engine/d' | sed 's/^[[:space:]]*//')
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ifeq ($(CPU_TYPE), cortex-a9)
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HOST_ARCH := aarch32
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else ifneq (,$(findstring cortex-a, $(CPU_TYPE)))
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HOST_ARCH := aarch64
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else
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HOST_ARCH := x86
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endif
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ifeq ($(DEV_ARCH), zynquplus)
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ifeq ($(HOST_ARCH), aarch64)
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include makefile_zynqmp.mk
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else
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include makefile_us_alveo.mk
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endif
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else ifeq ($(DEV_ARCH), zynq)
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include makefile_zynq7000.mk
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else ifeq ($(DEV_ARCH), versal)
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ifeq ($(HOST_ARCH), x86)
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include makefile_versal_alveo.mk
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else
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include makefile_versal_ps.mk
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endif
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else
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include makefile_us_alveo.mk
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endif
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################################ Help Section #################################
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help:
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help::
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$(ECHO) "Makefile Usage:"
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$(ECHO) " make all TARGET=<sw_emu/hw_emu/hw> PLATFORM=<FPGA platform> EDGE_COMMON_SW=<rootfs and kernel image path>"
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$(ECHO) " Command to generate the design for specified Target and Shell."
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$(ECHO) " make all TARGET=<sw_emu/hw_emu/hw> PLATFORM=<FPGA platform>"
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$(ECHO) " Command to generate the design for specified Target and Device."
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$(ECHO) ""
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$(ECHO) " make clean "
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$(ECHO) " Command to remove the generated non-hardware files."
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$(ECHO) " make cleanall"
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$(ECHO) " Command to remove all the generated files."
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$(ECHO) ""
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$(ECHO) " make test PLATFORM=<FPGA platform>"
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$(ECHO) " Command to run the application. This is same as 'run' target but does not have any makefile dependency."
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$(ECHO) ""
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$(ECHO) " make sd_card TARGET=<sw_emu/hw_emu/hw> PLATFORM=<FPGA platform> EDGE_COMMON_SW=<rootfs and kernel image path>"
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$(ECHO) " Command to prepare sd_card files."
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$(ECHO) ""
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$(ECHO) " make run TARGET=<sw_emu/hw_emu/hw> PLATFORM=<FPGA platform> EDGE_COMMON_SW=<rootfs and kernel image path>"
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$(ECHO) " make check TARGET=<sw_emu/hw_emu/hw> PLATFORM=<FPGA platform>"
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$(ECHO) " Command to run application in emulation."
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$(ECHO) ""
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$(ECHO) " make build TARGET=<sw_emu/hw_emu/hw> PLATFORM=<FPGA platform> EDGE_COMMON_SW=<rootfs and kernel image path>"
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$(ECHO) " Command to build xclbin application."
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$(ECHO) " make run_nimbix PLATFORM=<FPGA platform>"
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$(ECHO) " Command to run application on Nimbix Cloud."
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$(ECHO) ""
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$(ECHO) " make host EDGE_COMMON_SW=<rootfs and kernel image path>"
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$(ECHO) " Command to build host application."
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$(ECHO) " EDGE_COMMON_SW is required for SoC shells. Please download and use the pre-built image from - "
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$(ECHO) " https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/embedded-platforms.html"
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$(ECHO) " make aws_build PLATFORM=<FPGA platform>"
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$(ECHO) " Command to build AWS xclbin application on AWS Cloud."
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$(ECHO) ""
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TARGET := hw
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PLATFORM :=
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XCLBIN := ./xclbin
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VPP := $(XILINX_VITIS)/bin/v++
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CP = cp -rf
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RMDIR = rm -rf
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ECHO:= @echo
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XO_CONTAINER = $(XCLBIN)/vortex_afu.$(TARGET).xo
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XCLBIN_CONTAINER = $(XCLBIN)/vortex_afu.$(TARGET).xclbin
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# Kernel compiler global settings
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CLFLAGS += -t $(TARGET) --platform $(PLATFORM) --save-temps
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##########################################################################
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# The below commands generate a XO file from a pre-exsisitng RTL kernel.
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###########################################################################
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VIVADO := $(XILINX_VIVADO)/bin/vivado
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$(XO_CONTAINER): ./scripts/package_kernel.tcl ./scripts/gen_xo.tcl
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mkdir -p $(XCLBIN)
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$(VIVADO) -mode batch -source scripts/gen_xo.tcl -tclargs $(XO_CONTAINER) vortex_afu $(TARGET) $(PLATFORM)
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###########################################################################
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#END OF GENERATION OF XO
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##########################################################################
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.PHONY: all clean cleanall emconfig
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all: check-devices $(XCLBIN_CONTAINER) emconfig
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# Building kernel
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$(XCLBIN_CONTAINER): $(XO_CONTAINER)
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mkdir -p $(XCLBIN)
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$(VPP) $(CLFLAGS) $(LDCLFLAGS) -lo $(XCLBIN_CONTAINER) $(XO_CONTAINER)
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emconfig: $(XCLBIN)/emconfig.json
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$(XCLBIN)/emconfig.json:
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emconfigutil --platform $(PLATFORM) --od $(XCLBIN)
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# Cleaning stuff
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clean:
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-$(RMDIR) $(XCLBIN)/{*sw_emu*,*hw_emu*}
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-$(RMDIR) TempConfig system_estimate.xtxt *.rpt
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-$(RMDIR) src/*.ll _v++_* .Xil emconfig.json dltmp* xmltmp* *.log *.jou
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cleanall: clean
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-$(RMDIR) $(XCLBIN)
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-$(RMDIR) _x.*
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-$(RMDIR) ./tmp_kernel_pack* ./packaged_kernel* _x/
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#######################################################################
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# RTL Kernel only supports Hardware and Hardware Emulation.
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# THis line is to check that
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#########################################################################
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ifneq ($(TARGET),$(findstring $(TARGET), hw hw_emu))
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$(warning WARNING:Application supports only hw hw_emu TARGET. Please use the target for running the application)
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endif
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###################################################################
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#check the devices avaiable
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########################################################################
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check-devices:
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ifndef PLATFORM
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$(error PLATFORM not set. Please set the PLATFORM properly and rerun. Run "make help" for more details.)
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endif
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############################################################################
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# check the VITIS environment
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#############################################################################
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ifndef XILINX_VITIS
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$(error XILINX_VITIS variable is not set, please set correctly and rerun)
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endif
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#################################################################
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# Enable profiling if needed
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#####################################################################a
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REPORT := no
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PROFILE := no
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DEBUG := no
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#'estimate' for estimate report generation
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#'system' for system report generation
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ifneq ($(REPORT), no)
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CLFLAGS += --report estimate
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CLLDFLAGS += --report system
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endif
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#Generates profile summary report
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ifeq ($(PROFILE), yes)
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LDCLFLAGS += --profile_kernel data:all:all:all
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endif
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#Generates debug summary report
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ifeq ($(DEBUG), yes)
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CLFLAGS += --dk protocol:all:all:all
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endif
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