Merge remote-tracking branch 'upstream/HEAD' into simx-vpu

This commit is contained in:
MichaelJSr 2025-02-12 19:36:21 -08:00
commit bb939ed29d
11 changed files with 126 additions and 41 deletions

View file

@ -31,9 +31,9 @@ project_1/sources.txt:
build: $(PROJECT).xpr
$(PROJECT).xpr: project_1/sources.txt
ifdef FPU_IP
MAX_JOBS=$(JOBS) FPU_IP=project_1/ip SCRIPT_DIR=$(SCRIPT_DIR) $(VIVADO) -mode batch -source $(SRC_DIR)/project.tcl -tclargs $(TOP_LEVEL_ENTITY) $(DEVICE) project_1/sources.txt $(SRC_DIR)/project.xdc
MAX_JOBS=$(JOBS) FPU_IP=project_1/ip TOOL_DIR=$(SCRIPT_DIR) $(VIVADO) -mode batch -source $(SRC_DIR)/project.tcl -tclargs $(TOP_LEVEL_ENTITY) $(DEVICE) project_1/sources.txt $(SRC_DIR)/project.xdc
else
MAX_JOBS=$(JOBS) SCRIPT_DIR=$(SCRIPT_DIR) $(VIVADO) -mode batch -source $(SRC_DIR)/project.tcl -tclargs $(TOP_LEVEL_ENTITY) $(DEVICE) project_1/sources.txt $(SRC_DIR)/project.xdc
MAX_JOBS=$(JOBS) TOOL_DIR=$(SCRIPT_DIR) $(VIVADO) -mode batch -source $(SRC_DIR)/project.tcl -tclargs $(TOP_LEVEL_ENTITY) $(DEVICE) project_1/sources.txt $(SRC_DIR)/project.xdc
endif
clean:

View file

@ -0,0 +1,2 @@
set tool_dir $::env(TOOL_DIR)
source ${tool_dir}/xilinx_async_bram_patch.tcl

View file

@ -25,15 +25,15 @@ set device_part [lindex $::argv 1]
set vcs_file [lindex $::argv 2]
set xdc_file [lindex $::argv 3]
set script_dir $::env(SCRIPT_DIR)
set source_dir [file dirname [info script]]
set tool_dir $::env(TOOL_DIR)
set script_dir [ file dirname [ file normalize [ info script ] ] ]
puts "Using top_module=$top_module"
puts "Using device_part=$device_part"
puts "Using vcs_file=$vcs_file"
puts "Using xdc_file=$xdc_file"
puts "Using tool_dir=$tool_dir"
puts "Using script_dir=$script_dir"
puts "Using source_dir=$source_dir"
# Set the number of jobs based on MAX_JOBS environment variable
if {[info exists ::env(MAX_JOBS)]} {
@ -46,7 +46,7 @@ if {[info exists ::env(MAX_JOBS)]} {
proc run_setup {} {
global project_name
global top_module device_part vcs_file xdc_file
global script_dir source_dir
global script_dir tool_dir
global num_jobs
global argv argc ;# Using global system variables: argv and argc
@ -55,10 +55,10 @@ proc run_setup {} {
set ip_dir $::env(FPU_IP)
set argv [list $ip_dir $device_part]
set argc 2
source ${script_dir}/xilinx_ip_gen.tcl
source ${tool_dir}/xilinx_ip_gen.tcl
}
source "${script_dir}/parse_vcs_list.tcl"
source "${tool_dir}/parse_vcs_list.tcl"
set vlist [parse_vcs_list "${vcs_file}"]
set vsources_list [lindex $vlist 0]
@ -96,12 +96,22 @@ proc run_setup {} {
-objects [get_runs synth_1]
# register compilation hooks
#set_property STEPS.SYNTH_DESIGN.TCL.PRE ${source_dir}/pre_synth_hook.tcl [get_runs synth_1]
#set_property STEPS.SYNTH_DESIGN.TCL.POST ${source_dir}/post_synth_hook.tcl [get_runs synth_1]
set_property STEPS.OPT_DESIGN.TCL.PRE ${script_dir}/xilinx_async_bram_patch.tcl [get_runs impl_1]
#set_property STEPS.OPT_DESIGN.TCL.POST ${source_dir}/post_opt_hook.tcl [get_runs impl_1]
#set_property STEPS.ROUTE_DESIGN.TCL.PRE ${source_dir}/pre_route_hook.tcl [get_runs impl_1]
#set_property STEPS.ROUTE_DESIGN.TCL.POST ${source_dir}/post_route_hook.tcl [get_runs impl_1]
#set_property STEPS.SYNTH_DESIGN.TCL.PRE ${script_dir}/pre_synth_hook.tcl [get_runs synth_1]
#set_property STEPS.SYNTH_DESIGN.TCL.POST ${script_dir}/post_synth_hook.tcl [get_runs synth_1]
set_property STEPS.OPT_DESIGN.TCL.PRE ${script_dir}/pre_opt_hook.tcl [get_runs impl_1]
#set_property STEPS.OPT_DESIGN.TCL.POST ${script_dir}/post_opt_hook.tcl [get_runs impl_1]
#set_property STEPS.POWER_OPT_DESIGN.TCL.PRE ${script_dir}/pre_power_opt_hook.tcl [get_runs impl_1]
#set_property STEPS.POWER_OPT_DESIGN.TCL.POST ${script_dir}/post_power_opt_hook.tcl [get_runs impl_1]
#set_property STEPS.PLACE_DESIGN.TCL.PRE ${script_dir}/pre_place_hook.tcl [get_runs impl_1]
#set_property STEPS.PLACE_DESIGN.TCL.POST ${script_dir}/post_place_hook.tcl [get_runs impl_1]
#set_property STEPS.POST_PLACE_POWER_OPT_DESIGN.TCL.PRE ${script_dir}/pre_place_power_opt_hook.tcl [get_runs impl_1]
#set_property STEPS.POST_PLACE_POWER_OPT_DESIGN.TCL.POST ${script_dir}/post_place_power_opt_hook.tcl [get_runs impl_1]
#set_property STEPS.PHYS_OPT_DESIGN.TCL.PRE ${script_dir}/pre_phys_opt_hook.tcl [get_runs impl_1]
#set_property STEPS.PHYS_OPT_DESIGN.TCL.POST ${script_dir}/post_phys_opt_hook.tcl [get_runs impl_1]
#set_property STEPS.ROUTE_DESIGN.TCL.PRE ${script_dir}/pre_route_hook.tcl [get_runs impl_1]
#set_property STEPS.ROUTE_DESIGN.TCL.POST ${script_dir}/post_route_hook.tcl [get_runs impl_1]
#set_property STEPS.WRITE_BITSTREAM.TCL.PRE ${script_dir}/pre_bitstream_hook.tcl [get_runs impl_1]
#set_property STEPS.WRITE_BITSTREAM.TCL.POST ${script_dir}/post_bitstream_hook.tcl [get_runs impl_1]
update_compile_order -fileset sources_1
}

View file

@ -50,17 +50,26 @@ $(KERNEL).bin:
kernel.bin.coe: $(KERNEL).bin
$(SCRIPT_DIR)/bin2coe.py --out=$@ --binfile=8192:$(KERNEL).bin --depth=16384 --wordsize=64 --little_endian
pre_opt_hook.tcl: $(SRC_DIR)/pre_opt_hook.tcl
cp $< $@
simulate.tcl: $(SRC_DIR)/simulate.tcl
cp $< $@
gen-sources: project_1/sources.txt
project_1/sources.txt:
mkdir -p project_1
$(SCRIPT_DIR)/gen_sources.sh $(CFLAGS) -P -Cproject_1/src -Oproject_1/sources.txt
build: done.dcp
done.dcp: project_1/sources.txt kernel.bin.coe project.tcl
MAX_JOBS=$(JOBS) $(VIVADO) -mode batch -source project.tcl -tclargs $(DEVICE) project_1/sources.txt $(SCRIPT_DIR)
done.dcp: project_1/sources.txt kernel.bin.coe project.tcl pre_opt_hook.tcl
MAX_JOBS=$(JOBS) TOOL_DIR=$(SCRIPT_DIR) $(VIVADO) -mode batch -source project.tcl -tclargs $(DEVICE) project_1/sources.txt
echo done > done.dcp
run: project_1/project_1.xpr
run: simulate.tcl done.dcp
MAX_JOBS=$(JOBS) TOOL_DIR=$(SCRIPT_DIR) $(VIVADO) -mode batch -source simulate.tcl -tclargs project_1/project_1.xpr 50000ns
open: done.dcp
$(VIVADO) project_1/project_1.xpr &
clean:

View file

@ -0,0 +1,2 @@
set tool_dir $::env(TOOL_DIR)
source ${tool_dir}/xilinx_async_bram_patch.tcl

View file

@ -11,19 +11,22 @@
# See the License for the specific language governing permissions and
# limitations under the License.
if { $::argc != 3 } {
puts "ERROR: Program \"$::argv0\" requires 3 arguments!\n"
puts "Usage: $::argv0 <device_part> <vcs_file> <tool_dir>\n"
if { $::argc != 2 } {
puts "ERROR: Program \"$::argv0\" requires 2 arguments!\n"
puts "Usage: $::argv0 <device_part> <vcs_file>\n"
exit
}
set device_part [lindex $::argv 0]
set vcs_file [lindex $::argv 1]
set tool_dir [lindex $::argv 2]
set tool_dir $::env(TOOL_DIR)
set script_dir [ file dirname [ file normalize [ info script ] ] ]
puts "Using device_part=$device_part"
puts "Using vcs_file=$vcs_file"
puts "Using tool_dir=$tool_dir"
puts "Using script_dir=$script_dir"
# Set the number of jobs based on MAX_JOBS environment variable
if {[info exists ::env(MAX_JOBS)]} {
@ -35,7 +38,8 @@ if {[info exists ::env(MAX_JOBS)]} {
}
proc run_setup {} {
global device_part vcs_file tool_dir
global device_part vcs_file
global tool_dir script_dir
# Set the project name
set project_name "project_1"
@ -399,6 +403,24 @@ proc run_setup {} {
set wrapper_path [make_wrapper -fileset sources_1 -files [ get_files -norecurse design_1.bd] -top]
add_files -norecurse -fileset sources_1 $wrapper_path
# register compilation hooks
#set_property STEPS.SYNTH_DESIGN.TCL.PRE ${script_dir}/pre_synth_hook.tcl [get_runs synth_1]
#set_property STEPS.SYNTH_DESIGN.TCL.POST ${script_dir}/post_synth_hook.tcl [get_runs synth_1]
set_property STEPS.OPT_DESIGN.TCL.PRE ${script_dir}/pre_opt_hook.tcl [get_runs impl_1]
#set_property STEPS.OPT_DESIGN.TCL.POST ${script_dir}/post_opt_hook.tcl [get_runs impl_1]
#set_property STEPS.POWER_OPT_DESIGN.TCL.PRE ${script_dir}/pre_power_opt_hook.tcl [get_runs impl_1]
#set_property STEPS.POWER_OPT_DESIGN.TCL.POST ${script_dir}/post_power_opt_hook.tcl [get_runs impl_1]
#set_property STEPS.PLACE_DESIGN.TCL.PRE ${script_dir}/pre_place_hook.tcl [get_runs impl_1]
#set_property STEPS.PLACE_DESIGN.TCL.POST ${script_dir}/post_place_hook.tcl [get_runs impl_1]
#set_property STEPS.POST_PLACE_POWER_OPT_DESIGN.TCL.PRE ${script_dir}/pre_place_power_opt_hook.tcl [get_runs impl_1]
#set_property STEPS.POST_PLACE_POWER_OPT_DESIGN.TCL.POST ${script_dir}/post_place_power_opt_hook.tcl [get_runs impl_1]
#set_property STEPS.PHYS_OPT_DESIGN.TCL.PRE ${script_dir}/pre_phys_opt_hook.tcl [get_runs impl_1]
#set_property STEPS.PHYS_OPT_DESIGN.TCL.POST ${script_dir}/post_phys_opt_hook.tcl [get_runs impl_1]
#set_property STEPS.ROUTE_DESIGN.TCL.PRE ${script_dir}/pre_route_hook.tcl [get_runs impl_1]
#set_property STEPS.ROUTE_DESIGN.TCL.POST ${script_dir}/post_route_hook.tcl [get_runs impl_1]
#set_property STEPS.WRITE_BITSTREAM.TCL.PRE ${script_dir}/pre_bitstream_hook.tcl [get_runs impl_1]
#set_property STEPS.WRITE_BITSTREAM.TCL.POST ${script_dir}/post_bitstream_hook.tcl [get_runs impl_1]
update_compile_order -fileset sources_1
}
@ -419,8 +441,6 @@ proc run_synthesis {} {
proc run_implementation {} {
global tool_dir num_jobs
source "${tool_dir}/ila_insert.tcl"
insert_ila 8192
# Implementation
if {$num_jobs != 0} {

View file

@ -0,0 +1,34 @@
# Copyright © 2019-2023
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
if { $::argc != 2 } {
puts "ERROR: Program \"$::argv0\" requires 2 arguments!\n"
puts "Usage: $::argv0 <project> <simtime>\n"
exit
}
set project_file [lindex $::argv 0]
set sim_time [lindex $::argv 1]
set tb_name testbench ;# Replace with actual testbench module
open_project $project_file ;# Ensure correct project is loaded
# Ensure testbench is set as simulation top
set_property top $tb_name [get_filesets sim_1]
# Launch the simulation
launch_simulation -mode behavioral
# Run for the specified number of cycles
run $sim_time

View file

@ -90,7 +90,7 @@ VPP_FLAGS += --link --target $(TARGET) --platform $(PLATFORM) --save-temps --no_
VPP_FLAGS += --vivado.synth.jobs $(JOBS) --vivado.impl.jobs $(JOBS)
# register compilation hooks
VPP_FLAGS += --xp "vivado_prop:run.impl_1.STEPS.OPT_DESIGN.TCL.PRE={$(SCRIPT_DIR)/xilinx_async_bram_patch.tcl}"
VPP_FLAGS += --xp "vivado_prop:run.impl_1.STEPS.OPT_DESIGN.TCL.PRE=${SRC_DIR}/pre_opt_hook.tcl"
# load platform settings
include $(SRC_DIR)/platforms.mk
@ -166,11 +166,11 @@ $(BIN_DIR)/scope.json: $(BUILD_DIR)/vortex.xml
gen-xo: $(XO_CONTAINER)
$(XO_CONTAINER): $(BUILD_DIR)/sources.txt
mkdir -p $(BUILD_DIR); cd $(BUILD_DIR); $(VIVADO) -mode batch -source $(SRC_DIR)/gen_xo.tcl -tclargs ../$(XO_CONTAINER) vortex_afu sources.txt $(SCRIPT_DIR) ../$(BUILD_DIR)
mkdir -p $(BUILD_DIR); cd $(BUILD_DIR); TOOL_DIR=$(SCRIPT_DIR) $(VIVADO) -mode batch -source $(SRC_DIR)/gen_xo.tcl -tclargs ../$(XO_CONTAINER) vortex_afu sources.txt ../$(BUILD_DIR)
gen-bin: $(XCLBIN_CONTAINER)
$(XCLBIN_CONTAINER): $(XO_CONTAINER) $(SCOPE_JSON)
mkdir -p $(BIN_DIR); cd $(BUILD_DIR); $(VPP) $(VPP_FLAGS) -o ../$(XCLBIN_CONTAINER) ../$(XO_CONTAINER)
mkdir -p $(BIN_DIR); cd $(BUILD_DIR); TOOL_DIR=$(SCRIPT_DIR) $(VPP) $(VPP_FLAGS) -o ../$(XCLBIN_CONTAINER) ../$(XO_CONTAINER)
emconfig: $(BIN_DIR)/emconfig.json
$(BIN_DIR)/emconfig.json:
@ -183,6 +183,7 @@ ifeq ($(TARGET), hw)
cp $(BUILD_DIR)/_x/reports/link/syn/ulp_vortex_afu_1_0_synth_1_ulp_vortex_afu_1_0_utilization_synth.rpt $(BUILD_DIR)/bin
cp $(BUILD_DIR)/_x/reports/link/imp/impl_1_hw_bb_locked_utilization_placed.rpt $(BUILD_DIR)/bin
cp $(BUILD_DIR)/_x/reports/link/imp/impl_1_hw_bb_locked_timing_summary_routed.rpt $(BUILD_DIR)/bin
cp $(BUILD_DIR)/_x/link/vivado/vpl/prj/prj.runs/impl_1/hier_utilization.rpt $(BUILD_DIR)/bin
endif
chipscope:

View file

@ -11,19 +11,19 @@
# See the License for the specific language governing permissions and
# limitations under the License.
if { $::argc != 5 } {
puts "ERROR: Program \"$::argv0\" requires 5 arguments!\n"
puts "Usage: $::argv0 <xoname> <krnl_name> <vcs_file> <tool_dir> <build_dir>\n"
if { $::argc != 4 } {
puts "ERROR: Program \"$::argv0\" requires 4 arguments!\n"
puts "Usage: $::argv0 <xoname> <krnl_name> <vcs_file> <build_dir>\n"
exit
}
set xoname [lindex $::argv 0]
set krnl_name [lindex $::argv 1]
set vcs_file [lindex $::argv 2]
set tool_dir [lindex $::argv 3]
set build_dir [lindex $::argv 4]
set build_dir [lindex $::argv 3]
set script_path [ file dirname [ file normalize [ info script ] ] ]
set tool_dir $::env(TOOL_DIR)
set script_dir [ file dirname [ file normalize [ info script ] ] ]
if {[file exists "${xoname}"]} {
file delete -force "${xoname}"
@ -33,8 +33,8 @@ set argv [list ${build_dir}/ip]
set argc 1
source ${tool_dir}/xilinx_ip_gen.tcl
set argv [list ${krnl_name} ${vcs_file} ${tool_dir} ${build_dir}]
set argc 4
source ${script_path}/package_kernel.tcl
set argv [list ${krnl_name} ${vcs_file} ${build_dir}]
set argc 3
source ${script_dir}/package_kernel.tcl
package_xo -xo_path ${xoname} -kernel_name ${krnl_name} -ip_directory "${build_dir}/xo/packaged_kernel"

View file

@ -11,21 +11,24 @@
# See the License for the specific language governing permissions and
# limitations under the License.
if { $::argc != 4 } {
puts "ERROR: Program \"$::argv0\" requires 4 arguments!\n"
puts "Usage: $::argv0 <krnl_name> <vcs_file> <tool_dir> <build_dir>\n"
if { $::argc != 3 } {
puts "ERROR: Program \"$::argv0\" requires 3 arguments!\n"
puts "Usage: $::argv0 <krnl_name> <vcs_file> <build_dir>\n"
exit
}
set krnl_name [lindex $::argv 0]
set vcs_file [lindex $::argv 1]
set tool_dir [lindex $::argv 2]
set build_dir [lindex $::argv 3]
set build_dir [lindex $::argv 2]
set tool_dir $::env(TOOL_DIR)
set script_dir [ file dirname [ file normalize [ info script ] ] ]
puts "Using krnl_name=$krnl_name"
puts "Using vcs_file=$vcs_file"
puts "Using tool_dir=$tool_dir"
puts "Using build_dir=$build_dir"
puts "Using script_dir=$script_dir"
set path_to_packaged "${build_dir}/xo/packaged_kernel"
set path_to_tmp_project "${build_dir}/xo/project"

View file

@ -0,0 +1,4 @@
set tool_dir $::env(TOOL_DIR)
source ${tool_dir}/xilinx_async_bram_patch.tcl
report_utilization -file hier_utilization.rpt -hierarchical -hierarchical_percentages