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minor update

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This commit is contained in:
Blaise Tine 2021-09-29 04:49:36 -04:00
parent 04249c3ee9
commit bbcb50ba81
3 changed files with 3 additions and 3 deletions
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2
hw/simulate/Makefile
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@ -47,7 +47,7 @@ VL_FLAGS += --x-initial unique --x-assign unique
VL_FLAGS += verilator.vlt
VL_FLAGS += --exe $(SRCS) $(RTL_INCLUDE)
VL_FLAGS += --cc Vortex.v --top-module $(TOP)
VL_FLAGS += --cc $(TOP) --top-module $(TOP)
# FPU backend
FPU_CORE ?= FPU_FPNEW

2
hw/syn/quartus/vortex/Makefile
View file

@ -1,6 +1,6 @@
PROJECT = Vortex
TOP_LEVEL_ENTITY = Vortex
SRC_FILE = Vortex.v
SRC_FILE = Vortex.sv
RTL_DIR = ../../../../rtl
FAMILY = "Arria 10"

2
hw/syn/yosys/Makefile
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@ -1,6 +1,6 @@
PROJECT = Vortex
TOP_LEVEL_ENTITY = Vortex
SRC_FILE = Vortex.v
SRC_FILE = Vortex.sv
RTL_DIR = ../../rtl
DEFINES = -DNDEBUG -DSYNTHESIS -DEXT_F_DISABLE -DNUM_CORES=1 -DNUM_THREADS=2 -DNUM_WARPS=2 -DMEM_BLOCK_SIZE=64